From patchwork Thu May 30 10:20:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matan Azrad X-Patchwork-Id: 53897 X-Patchwork-Delegate: shahafs@mellanox.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5124C1B997; Thu, 30 May 2019 12:20:51 +0200 (CEST) Received: from git-send-mailer.rdmz.labs.mlnx (unknown [37.142.13.130]) by dpdk.org (Postfix) with ESMTP id DF3831B950; Thu, 30 May 2019 12:20:44 +0200 (CEST) From: Matan Azrad To: Shahaf Shuler , Yongseok Koh Cc: dev@dpdk.org, stable@dpdk.org Date: Thu, 30 May 2019 10:20:34 +0000 Message-Id: <1559211639-17442-5-git-send-email-matan@mellanox.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1559211639-17442-1-git-send-email-matan@mellanox.com> References: <1559211639-17442-1-git-send-email-matan@mellanox.com> Subject: [dpdk-dev] [PATCH v1 4/9] net/mlx5: mitigate Rx doorbell memory barrier X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The RQ WQEs must be written in the memory before the HW gets the RQ doorbell, hence a memory barrier should be triggered after the WQEs writing and before the doorbell writing. The current code used rte_wmb barrier which ensures that all the memory stores were done while it is enough to use rte_cio_wmb barrier for the local memory stores because the WQEs are in local memory. CC: stable@dpdk.org Signed-off-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index b248f38..282295f 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -1009,7 +1009,7 @@ struct mlx5_rxq_ibv * rxq_data->decompressed = 0; /* Update doorbell counter. */ rxq_data->rq_ci = wqe_n >> rxq_data->sges_n; - rte_wmb(); + rte_cio_wmb(); *rxq_data->rq_db = rte_cpu_to_be_32(rxq_data->rq_ci); DRV_LOG(DEBUG, "port %u rxq %u updated with %p", dev->data->port_id, idx, (void *)&tmpl);