[03/15] bus/pci: add fallback for out[lwb]_p for non GNU libc

Message ID 20190311173702.24471-4-ncopa@alpinelinux.org (mailing list archive)
State Superseded, archived
Headers
Series Build fixes for musl libc |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation fail Compilation issues

Commit Message

Natanael Copa March 11, 2019, 5:36 p.m. UTC
  Add a fallback for non-GNU libc systems like musl libc for the
non-standard functions  outl_p, outw_p and outb_p.

This ifixes the following buildtime errors when building with musl libc:
pci_uio.c:(.text+0xaa1): undefined reference to `outw_p'
pci_uio.c:(.text+0xac5): undefined reference to `outl_p'
pci_uio.c:(.text+0xadf): undefined reference to `outb_p'

fixes https://bugs.dpdk.org/show_bug.cgi?id=35

Signed-off-by: Natanael Copa <ncopa@alpinelinux.org>
---

Please note that this is only compile tested with musl libc.

 drivers/bus/pci/linux/pci_uio.c | 32 +++++++++++++++++++++++++++++---
 1 file changed, 29 insertions(+), 3 deletions(-)
  

Patch

diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c
index 09ecbb7aa..6058cd9f8 100644
--- a/drivers/bus/pci/linux/pci_uio.c
+++ b/drivers/bus/pci/linux/pci_uio.c
@@ -14,6 +14,32 @@ 
 
 #if defined(RTE_ARCH_X86)
 #include <sys/io.h>
+#if defined(__GLIBC__)
+#define pci_uio_outl_p outl_p
+#define pci_uio_outw_p outw_p
+#define pci_uio_outb_p outb_p
+#else
+static inline void
+pci_uio_outl_p(unsigned int value, unsigned short int port)
+{
+  __asm__ __volatile__ ("outl %0,%w1\noutb %%al,$0x80": :"a" (value),
+			"Nd" (port));
+}
+
+static inline void
+pci_uio_outw_p(unsigned short int value, unsigned short int port)
+{
+  __asm__ __volatile__ ("outw %w0,%w1\noutb %%al,$0x80": :"a" (value),
+			"Nd" (port));
+}
+
+static inline void
+pci_uio_outb_p(unsigned char value, unsigned short int port)
+{
+  __asm__ __volatile__ ("outb %b0,%w1\noutb %%al,$0x80": :"a" (value),
+			"Nd" (port));
+}
+#endif
 #endif
 
 #include <rte_log.h>
@@ -527,21 +553,21 @@  pci_uio_ioport_write(struct rte_pci_ioport *p,
 		if (len >= 4) {
 			size = 4;
 #if defined(RTE_ARCH_X86)
-			outl_p(*(const uint32_t *)s, reg);
+			pci_uio_outl_p(*(const uint32_t *)s, reg);
 #else
 			*(volatile uint32_t *)reg = *(const uint32_t *)s;
 #endif
 		} else if (len >= 2) {
 			size = 2;
 #if defined(RTE_ARCH_X86)
-			outw_p(*(const uint16_t *)s, reg);
+			pci_uio_outw_p(*(const uint16_t *)s, reg);
 #else
 			*(volatile uint16_t *)reg = *(const uint16_t *)s;
 #endif
 		} else {
 			size = 1;
 #if defined(RTE_ARCH_X86)
-			outb_p(*s, reg);
+			pci_uio_outb_p(*s, reg);
 #else
 			*(volatile uint8_t *)reg = *s;
 #endif