net/mlx5: fix sync when handling Tx completions
diff mbox series

Message ID 1551367230-38039-1-git-send-email-dekelp@mellanox.com
State Accepted, archived
Delegated to: Shahaf Shuler
Headers show
Series
  • net/mlx5: fix sync when handling Tx completions
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Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS

Commit Message

Dekel Peled Feb. 28, 2019, 3:20 p.m. UTC
Function mlx5_tx_complete() reads completion entry information
from Tx queue.
For some processors not having strongly-ordered memory model,
there has to be a memory barrier between reading the entry index
and the entry fields, in order to guarantee data is valid.

Fixes: 54d3fe948dba ("net/mlx5: poll completion queue once per a call")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
---
 drivers/net/mlx5/mlx5_rxtx.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Shahaf Shuler March 7, 2019, 8:38 a.m. UTC | #1
Thursday, February 28, 2019 5:21 PM, Dekel Peled:
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix sync when handling Tx
> completions
> 
> Function mlx5_tx_complete() reads completion entry information from Tx
> queue.
> For some processors not having strongly-ordered memory model, there has
> to be a memory barrier between reading the entry index and the entry
> fields, in order to guarantee data is valid.
> 
> Fixes: 54d3fe948dba ("net/mlx5: poll completion queue once per a call")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Dekel Peled <dekelp@mellanox.com>

Applied to next-net-mlx, thanks.

Patch
diff mbox series

diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h
index c0e1adf..53115dd 100644
--- a/drivers/net/mlx5/mlx5_rxtx.h
+++ b/drivers/net/mlx5/mlx5_rxtx.h
@@ -568,6 +568,7 @@  uint32_t mlx5_tx_update_ext_mp(struct mlx5_txq_data *txq, uintptr_t addr,
 	}
 #endif /* NDEBUG */
 	++cq_ci;
+	rte_cio_rmb();
 	txq->wqe_pi = rte_be_to_cpu_16(cqe->wqe_counter);
 	ctrl = (volatile struct mlx5_wqe_ctrl *)
 		tx_mlx5_wqe(txq, txq->wqe_pi);