usertools: add octeontx2 SSO and NPA PCIe devices

Message ID 20190226122844.4460-1-jerinj@marvell.com
State Accepted, archived
Delegated to: Thomas Monjalon
Headers show
Series
  • usertools: add octeontx2 SSO and NPA PCIe devices
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Checks

Context Check Description
ci/Intel-compilation success Compilation OK
ci/mellanox-Performance-Testing success Performance Testing PASS
ci/intel-Performance-Testing success Performance Testing PASS
ci/checkpatch warning coding style issues

Commit Message

Jerin Jacob Kollanukkaran Feb. 26, 2019, 12:29 p.m.
Add the Marvell's octeontx2's SSO and NPA PCIe devices as
eventdev, mempool devices in devbind script.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
---
 usertools/dpdk-devbind.py | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

Comments

Thomas Monjalon March 27, 2019, 12:13 a.m. | #1
26/02/2019 13:29, Jerin Jacob Kollanukkaran:
> Add the Marvell's octeontx2's SSO and NPA PCIe devices as
> eventdev, mempool devices in devbind script.
> 
> Signed-off-by: Jerin Jacob <jerinj@marvell.com>

Applied, thanks

Patch

diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index a9cd66a78..249b65ac3 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -29,10 +29,15 @@ 
 avp_vnic = {'Class': '05', 'Vendor': '1af4', 'Device': '1110',
               'SVendor': None, 'SDevice': None}
 
+octeontx2_sso = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f9,a0fa',
+              'SVendor': None, 'SDevice': None}
+octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
+              'SVendor': None, 'SDevice': None}
+
 network_devices = [network_class, cavium_pkx, avp_vnic]
 crypto_devices = [encryption_class, intel_processor_class]
-eventdev_devices = [cavium_sso, cavium_tim]
-mempool_devices = [cavium_fpa]
+eventdev_devices = [cavium_sso, cavium_tim, octeontx2_sso]
+mempool_devices = [cavium_fpa, octeontx2_npa]
 compress_devices = [cavium_zip]
 
 # global dict ethernet devices present. Dictionary indexed by PCI address.