From patchwork Tue Jan 15 12:56:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 49831 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4912C5F1B; Tue, 15 Jan 2019 13:55:36 +0100 (CET) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id CC6A42C52 for ; Tue, 15 Jan 2019 13:55:32 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Jan 2019 04:55:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,481,1539673200"; d="scan'208";a="127889456" Received: from dpdk51.sh.intel.com ([10.67.110.190]) by orsmga001.jf.intel.com with ESMTP; 15 Jan 2019 04:55:31 -0800 From: Qi Zhang To: wenzhuo.lu@intel.com, qiming.yang@intel.com Cc: paul.m.stillwell.jr@intel.com, dev@dpdk.org, bruce.richardson@intel.com, ferruh.yigit@intel.com, Qi Zhang Date: Tue, 15 Jan 2019 20:56:52 +0800 Message-Id: <20190115125658.15421-2-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20190115125658.15421-1-qi.z.zhang@intel.com> References: <20190115125658.15421-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 1/7] net/ice/base: code clean X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove some unnecessary code. Signed-off-by: Qi Zhang Signed-off-by: Paul M Stillwell Jr --- drivers/net/ice/base/ice_common.c | 14 -------------- drivers/net/ice/base/ice_common.h | 17 ----------------- drivers/net/ice/base/ice_controlq.c | 2 +- 3 files changed, 1 insertion(+), 32 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index d49264d14..2ccf58527 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -60,16 +60,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } -#if defined(FPGA_SUPPORT) || defined(CVL_A0_SUPPORT) -void ice_dev_onetime_setup(struct ice_hw *hw) -{ - /* configure Rx - set non pxe mode */ - wr32(hw, GLLAN_RCTL_0, 0x1); - - - -} -#endif /* FPGA_SUPPORT || CVL_A0_SUPPORT */ /** * ice_clear_pf_cfg - Clear PF configuration @@ -830,10 +820,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; -#if defined(FPGA_SUPPORT) || defined(CVL_A0_SUPPORT) - /* some of the register write workarounds to get Rx working */ - ice_dev_onetime_setup(hw); -#endif /* FPGA_SUPPORT || CVL_A0_SUPPORT */ /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index 082ae66f9..0197fbfe3 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -9,18 +9,6 @@ #include "ice_switch.h" -/* prototype for functions used for SW locks */ -void ice_free_list(struct LIST_HEAD_TYPE *list); -void ice_init_lock(struct ice_lock *lock); -void ice_acquire_lock(struct ice_lock *lock); -void ice_release_lock(struct ice_lock *lock); -void ice_destroy_lock(struct ice_lock *lock); - -void *ice_alloc_dma_mem(struct ice_hw *hw, struct ice_dma_mem *m, u64 size); -void ice_free_dma_mem(struct ice_hw *hw, struct ice_dma_mem *m); - -bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq); - enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw); void @@ -61,11 +49,6 @@ enum ice_status ice_get_caps(struct ice_hw *hw); -#if defined(FPGA_SUPPORT) || defined(CVL_A0_SUPPORT) -void ice_dev_onetime_setup(struct ice_hw *hw); -#endif /* FPGA_SUPPORT || CVL_A0_SUPPORT */ - - enum ice_status ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, u32 rxq_index); diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index fb82c23ee..cbc4cb4c2 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -735,7 +735,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq) * Returns true if the firmware has processed all descriptors on the * admin send queue. Returns false if there are still requests pending. */ -bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq) +static bool ice_sq_done(struct ice_hw *hw, struct ice_ctl_q_info *cq) { /* AQ designers suggest use of head for better * timing reliability than DD bit