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Fri, 11 Jan 2019 12:24:08 +0000 Received: from VI1PR04MB4688.eurprd04.prod.outlook.com ([fe80::b1eb:7e7e:7b90:7b4]) by VI1PR04MB4688.eurprd04.prod.outlook.com ([fe80::b1eb:7e7e:7b90:7b4%4]) with mapi id 15.20.1516.016; Fri, 11 Jan 2019 12:24:08 +0000 From: Shreyansh Jain To: "dev@dpdk.org" CC: "ferruh.yigit@intel.com" , Youri Querry , "stable@dpdk.org" Thread-Topic: [PATCH v3 02/19] bus/fslmc: fix the ring mode to use correct cache settings Thread-Index: AQHUqaiMGaxG0i+CE0muAW/nLhKpbg== Date: Fri, 11 Jan 2019 12:24:08 +0000 Message-ID: <20190111122305.7133-3-shreyansh.jain@nxp.com> References: <20190111115712.6482-1-shreyansh.jain@nxp.com> <20190111122305.7133-1-shreyansh.jain@nxp.com> In-Reply-To: <20190111122305.7133-1-shreyansh.jain@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [14.143.254.130] x-mailer: git-send-email 2.17.1 x-clientproxiedby: TY2PR01CA0017.jpnprd01.prod.outlook.com (2603:1096:404:a::29) To VI1PR04MB4688.eurprd04.prod.outlook.com (2603:10a6:803:71::16) authentication-results: spf=none (sender IP is ) smtp.mailfrom=shreyansh.jain@nxp.com; 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H:VI1PR04MB4688.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: fLUJhSenWYdu/agUoamprRvmu1pNf2TSTcdEQtZQHLkmgVmGPAZDz7vDJx792yLuxNfmXdgGtsJWEnso0nAAGlg3QkKf3HHZGrbqaIrzGV+AFoVM39Qjpnd4Ek+rEb4kbTJOXKHJR57iQKbV9/O6qDsmpQVKnkPvz9NvvZc63rO7f8L4Z+WySf+nFQOrLfwLOis4YyD5dfdARdnmh/tsEsVDyyV80pB4CsTpKM+4qNLzJ7BM+Ps4Ug+4kFkqV/Ee+KcZFC/lZbddsqRkMI4IbBMLQIXrLEX6mz6MoVbMmI7qPIqKyl8Vvqyr0HqHvXMTK7nJX1ocqGd3iEwkM1uz+lkAK78Bl/kODV/YG9P+tXwS+3k1DW85ie3C7Hn5nooaokNvaA5S+UaA90sFQgFxxSWRBb5Nc/4OEBmyhHhMFb8= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4a31cdc5-adcf-4c1d-7128-08d677bfaf22 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 Jan 2019 12:24:05.2723 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR04MB5694 Subject: [dpdk-dev] [PATCH v3 02/19] bus/fslmc: fix the ring mode to use correct cache settings X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Youri Querry The code was incorrectly using the cache inhibited access. It shall use cached enabled access for better performance. Fixes: 293c0ca94c36 ("bus/fslmc: support memory backed portals with QBMAN 5.0") Cc: stable@dpdk.org Signed-off-by: Youri Querry --- drivers/bus/fslmc/qbman/qbman_portal.c | 12 ++++++------ drivers/bus/fslmc/qbman/qbman_sys.h | 1 + 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c index 3380e54f5..bbea37efc 100644 --- a/drivers/bus/fslmc/qbman/qbman_portal.c +++ b/drivers/bus/fslmc/qbman/qbman_portal.c @@ -683,8 +683,8 @@ static int qbman_swp_enqueue_ring_mode_mem_back(struct qbman_swp *s, full_mask = s->eqcr.pi_mask; if (!s->eqcr.available) { eqcr_ci = s->eqcr.ci; - s->eqcr.ci = qbman_cinh_read(&s->sys, - QBMAN_CENA_SWP_EQCR_CI) & full_mask; + s->eqcr.ci = qbman_cena_read_reg(&s->sys, + QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask; s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, eqcr_ci, s->eqcr.ci); if (!s->eqcr.available) @@ -809,8 +809,8 @@ static int qbman_swp_enqueue_multiple_mem_back(struct qbman_swp *s, full_mask = s->eqcr.pi_mask; if (!s->eqcr.available) { eqcr_ci = s->eqcr.ci; - s->eqcr.ci = qbman_cinh_read(&s->sys, - QBMAN_CENA_SWP_EQCR_CI) & full_mask; + s->eqcr.ci = qbman_cena_read_reg(&s->sys, + QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask; s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, eqcr_ci, s->eqcr.ci); if (!s->eqcr.available) @@ -941,8 +941,8 @@ static int qbman_swp_enqueue_multiple_desc_mem_back(struct qbman_swp *s, full_mask = s->eqcr.pi_mask; if (!s->eqcr.available) { eqcr_ci = s->eqcr.ci; - s->eqcr.ci = qbman_cinh_read(&s->sys, - QBMAN_CENA_SWP_EQCR_CI) & full_mask; + s->eqcr.ci = qbman_cena_read_reg(&s->sys, + QBMAN_CENA_SWP_EQCR_CI_MEMBACK) & full_mask; s->eqcr.available = qm_cyc_diff(s->eqcr.pi_ring_size, eqcr_ci, s->eqcr.ci); if (!s->eqcr.available) diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h index d41af8358..0571097ab 100644 --- a/drivers/bus/fslmc/qbman/qbman_sys.h +++ b/drivers/bus/fslmc/qbman/qbman_sys.h @@ -55,6 +55,7 @@ #define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1)) #define QBMAN_CENA_SWP_VDQCR 0x780 #define QBMAN_CENA_SWP_EQCR_CI 0x840 +#define QBMAN_CENA_SWP_EQCR_CI_MEMBACK 0x1840 /* CENA register offsets in memory-backed mode */ #define QBMAN_CENA_SWP_DQRR_MEM(n) (0x800 + ((uint32_t)(n) << 6))