From patchwork Mon Sep 24 13:50:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 45208 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A7366532C; Mon, 24 Sep 2018 15:51:05 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [148.163.129.52]) by dpdk.org (Postfix) with ESMTP id 69C8C2C15 for ; Mon, 24 Sep 2018 15:50:51 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us3.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id 4CCFBB4007C for ; Mon, 24 Sep 2018 13:50:50 +0000 (UTC) Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 24 Sep 2018 06:50:47 -0700 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Mon, 24 Sep 2018 06:50:47 -0700 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w8ODojRm014516; Mon, 24 Sep 2018 14:50:45 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id A6B2B1626D2; Mon, 24 Sep 2018 14:50:45 +0100 (BST) From: Andrew Rybchenko To: CC: Richard Houldsworth Date: Mon, 24 Sep 2018 14:50:24 +0100 Message-ID: <1537797030-26548-6-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1537797030-26548-1-git-send-email-arybchenko@solarflare.com> References: <1537797030-26548-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24114.005 X-TM-AS-Result: No-1.819200-4.000000-10 X-TMASE-MatchedRID: 6pbNFWS8cDsLazoQyrpm0gPZZctd3P4BWjWsWQUWzVpeARTvhomDCi9w iqtW2KFAOfAiJ/eonC2JFD9cJ7KNbLLDOFoORDA/syNb+yeIRAq8n1e+HkKZPpsoi2XrUn/Jn6K dMrRsL14qtq5d3cxkNdWEhzhkLapeDfcWB5bv93FIn9eawy/zxUgjfkTgOJKT1CMjl+BdWp/Vmy tinfe+kp+xIYSE5p+VZ4Q5iK67ow+/VBRnooWfncCGzXCiH+kqOKBkFAm8GOUPoO5ncI6OuehbQ 2QpmASdyky8P5TYMPI= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.819200-4.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24114.005 X-MDID: 1537797050-TFeI_PTc2-zJ Subject: [dpdk-dev] [PATCH 05/11] net/sfc/base: add X2 port modes to bandwidth calculator X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Richard Houldsworth Add cases for the new port modes supported by X2 NICs. Lane bandwidth is calculated for pre-X2 cards so is an underestimate for X2 in 25G/100G modes. Signed-off-by: Richard Houldsworth Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_nic.c | 43 ++++++++++++++++++++++++++------- 1 file changed, 34 insertions(+), 9 deletions(-) diff --git a/drivers/net/sfc/base/ef10_nic.c b/drivers/net/sfc/base/ef10_nic.c index c3634e351..1eea7c673 100644 --- a/drivers/net/sfc/base/ef10_nic.c +++ b/drivers/net/sfc/base/ef10_nic.c @@ -131,34 +131,59 @@ ef10_nic_get_port_mode_bandwidth( __in uint32_t port_mode, __out uint32_t *bandwidth_mbpsp) { + uint32_t single_lane = 10000; + uint32_t dual_lane = 50000; + uint32_t quad_lane = 40000; uint32_t bandwidth; efx_rc_t rc; switch (port_mode) { case TLV_PORT_MODE_1x1_NA: /* mode 0 */ - bandwidth = 10000; + bandwidth = single_lane; + break; + case TLV_PORT_MODE_1x2_NA: /* mode 10 */ + case TLV_PORT_MODE_NA_1x2: /* mode 11 */ + bandwidth = dual_lane; break; case TLV_PORT_MODE_1x1_1x1: /* mode 2 */ - bandwidth = 10000 * 2; + bandwidth = single_lane + single_lane; break; case TLV_PORT_MODE_4x1_NA: /* mode 4 */ - case TLV_PORT_MODE_2x1_2x1: /* mode 5 */ case TLV_PORT_MODE_NA_4x1: /* mode 8 */ - bandwidth = 10000 * 4; + bandwidth = 4 * single_lane; + break; + case TLV_PORT_MODE_2x1_2x1: /* mode 5 */ + bandwidth = (2 * single_lane) + (2 * single_lane); + break; + case TLV_PORT_MODE_1x2_1x2: /* mode 12 */ + bandwidth = dual_lane + dual_lane; + break; + case TLV_PORT_MODE_1x2_2x1: /* mode 17 */ + case TLV_PORT_MODE_2x1_1x2: /* mode 18 */ + bandwidth = dual_lane + (2 * single_lane); break; /* Legacy Medford-only mode. Do not use (see bug63270) */ case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2: /* mode 9 */ - bandwidth = 10000 * 4; + bandwidth = 4 * single_lane; break; case TLV_PORT_MODE_1x4_NA: /* mode 1 */ - bandwidth = 40000; + case TLV_PORT_MODE_NA_1x4: /* mode 22 */ + bandwidth = quad_lane; break; - case TLV_PORT_MODE_1x4_1x4: /* mode 3 */ - bandwidth = 40000 * 2; + case TLV_PORT_MODE_2x2_NA: /* mode 13 */ + case TLV_PORT_MODE_NA_2x2: /* mode 14 */ + bandwidth = 2 * dual_lane; break; case TLV_PORT_MODE_1x4_2x1: /* mode 6 */ case TLV_PORT_MODE_2x1_1x4: /* mode 7 */ - bandwidth = 40000 + (10000 * 2); + bandwidth = quad_lane + (2 * single_lane); + break; + case TLV_PORT_MODE_1x4_1x2: /* mode 15 */ + case TLV_PORT_MODE_1x2_1x4: /* mode 16 */ + bandwidth = quad_lane + dual_lane; + break; + case TLV_PORT_MODE_1x4_1x4: /* mode 3 */ + bandwidth = quad_lane + quad_lane; break; default: rc = EINVAL;