From patchwork Tue Sep 18 12:45:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Mattias_R=C3=B6nnblom?= X-Patchwork-Id: 44829 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D57084CA7; Tue, 18 Sep 2018 14:45:29 +0200 (CEST) Received: from sesbmg22.ericsson.net (sesbmg22.ericsson.net [193.180.251.48]) by dpdk.org (Postfix) with ESMTP id ED6D61559 for ; Tue, 18 Sep 2018 14:45:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; d=ericsson.com; s=mailgw201801; c=relaxed/simple; q=dns/txt; i=@ericsson.com; t=1537274727; h=From:Sender:Reply-To:Subject:Date:Message-ID:To:CC:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=sDjOTcjeojkD8K7Ap/OaqmNcKTelKLhp615LZB8A7zg=; b=ba3c4yj6ug37SCv8qU9eyC+0dzcIcpWYf63+ZZXWYstw+bywo6vHO5l8a2dsUoxc f6WwfT77RfoETO7zQpIG6h9/omo+ts0p6BSLSgfKr2i1jJP2Y2h13aqyEYXiRw4q BkLCcStXyXLRC3hTNtOyM5Pte9LPmP1x2G1gOy5Bvzk=; X-AuditID: c1b4fb30-ff9ff700000055da-d7-5ba0f367bf6d Received: from ESESSMB503.ericsson.se (Unknown_Domain [153.88.183.121]) by sesbmg22.ericsson.net (Symantec Mail Security) with SMTP id B0.49.21978.763F0AB5; Tue, 18 Sep 2018 14:45:27 +0200 (CEST) Received: from ESESBMR501.ericsson.se (153.88.183.129) by ESESSMB503.ericsson.se (153.88.183.191) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 18 Sep 2018 14:45:26 +0200 Received: from ESESBMB504.ericsson.se (153.88.183.171) by ESESBMR501.ericsson.se (153.88.183.129) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Tue, 18 Sep 2018 14:45:26 +0200 Received: from selio1a020.lmera.ericsson.se (153.88.183.153) by smtp.internal.ericsson.com (153.88.183.187) with Microsoft SMTP Server id 15.1.1466.3 via Frontend Transport; Tue, 18 Sep 2018 14:45:26 +0200 Received: from breslau.lmera.ericsson.se (breslau.lmera.ericsson.se [150.132.109.241]) by selio1a020.lmera.ericsson.se (8.15.1+Sun/8.15.1) with ESMTP id w8ICjQ1V011575; Tue, 18 Sep 2018 14:45:27 +0200 (CEST) From: =?utf-8?q?Mattias_R=C3=B6nnblom?= To: Jerin Jacob CC: Bruce Richardson , , =?utf-8?q?Mattias_R=C3=B6nnblom?= Date: Tue, 18 Sep 2018 14:45:06 +0200 Message-ID: <20180918124514.10615-3-mattias.ronnblom@ericsson.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180918124514.10615-1-mattias.ronnblom@ericsson.com> References: <20180918124514.10615-1-mattias.ronnblom@ericsson.com> MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrILMWRmVeSWpSXmKPExsUyM2J7pW765wXRBnNPSVjcWGVv8e7TdiaL iZNMHJg9NpzoZ/X4tWApq8fiPS+ZApijuGxSUnMyy1KL9O0SuDLubn3NVtCqXDHx61m2BsbV sl2MHBwSAiYSnT0WXYycHEICRxkluv+zdjFyAdnfGCXmn1/NDOc87X4MlbnIKNG76j9U5jKj xKwfcxhB+tkEPCUmv+tmAbFFBAwkFp25D1bELNDBKNE89Q9YQljAW6Lp1AQ2kN0sAqoSf+47 gYR5BZwk/ncdZAWxJQTkJVZvOMAMYnMKOEt8nrqOCaRcCKjm4gZliHJBiZMzn4BNZBbQlGjd /psdwpaXaN46mxniHS2J+0u+ME9gFJ6FpGUWkpZZSFoWMDKvYhQtTi1Oyk03MtJLLcpMLi7O z9PLSy3ZxAgM+INbfhvsYHz53PEQowAHoxIPb/SrBdFCrIllxZW5hxglOJiVRHg5c4BCvCmJ lVWpRfnxRaU5qcWHGKU5WJTEeS38NkcJCaQnlqRmp6YWpBbBZJk4OKUaGP3YrbscPxkEq67c 9ZLvSsyfkwZljFsc38+VSer8sOpQp4D86W3TUt8a3vJfuP6qa3KXon5dUS0z3/f3m2zT3Pra ZboEkj/NmCDzmsWCRcTXo/ac2Mf+tVuyHUrnfPss75J3d3WVTtzJTI9gu3V+Z14JZvZfm+C1 yI3hUk7pDLHPfmu5D4iIKrEUZyQaajEXFScCANPxjYl0AgAA Subject: [dpdk-dev] [PATCH v4 02/10] event/dsw: add DSW device and queue configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Allow queue- and device-level configuration for and retrieval of contextual information from a DSW event device. Signed-off-by: Mattias Rönnblom --- drivers/event/dsw/dsw_evdev.c | 87 +++++++++++++++++++++++++++++++++++ drivers/event/dsw/dsw_evdev.h | 28 +++++++++++ 2 files changed, 115 insertions(+) diff --git a/drivers/event/dsw/dsw_evdev.c b/drivers/event/dsw/dsw_evdev.c index 6990bbc9e..1500d2426 100644 --- a/drivers/event/dsw/dsw_evdev.c +++ b/drivers/event/dsw/dsw_evdev.c @@ -9,6 +9,91 @@ #define EVENTDEV_NAME_DSW_PMD event_dsw +static int +dsw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id, + const struct rte_event_queue_conf *conf) +{ + struct dsw_evdev *dsw = dsw_pmd_priv(dev); + struct dsw_queue *queue = &dsw->queues[queue_id]; + + if (RTE_EVENT_QUEUE_CFG_ALL_TYPES & conf->event_queue_cfg) + return -ENOTSUP; + + if (conf->schedule_type == RTE_SCHED_TYPE_ORDERED) + return -ENOTSUP; + + /* SINGLE_LINK is better off treated as TYPE_ATOMIC, since it + * avoid the "fake" TYPE_PARALLEL flow_id assignment. Since + * the queue will only have a single serving port, no + * migration will ever happen, so the extra TYPE_ATOMIC + * migration overhead is avoided. + */ + if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) + queue->schedule_type = RTE_SCHED_TYPE_ATOMIC; + else /* atomic or parallel */ + queue->schedule_type = conf->schedule_type; + + queue->num_serving_ports = 0; + + return 0; +} + +static void +dsw_queue_def_conf(struct rte_eventdev *dev __rte_unused, + uint8_t queue_id __rte_unused, + struct rte_event_queue_conf *queue_conf) +{ + *queue_conf = (struct rte_event_queue_conf) { + .nb_atomic_flows = 4096, + .schedule_type = RTE_SCHED_TYPE_ATOMIC, + .priority = RTE_EVENT_DEV_PRIORITY_NORMAL + }; +} + +static void +dsw_queue_release(struct rte_eventdev *dev __rte_unused, + uint8_t queue_id __rte_unused) +{ +} + +static void +dsw_info_get(struct rte_eventdev *dev __rte_unused, + struct rte_event_dev_info *info) +{ + *info = (struct rte_event_dev_info) { + .driver_name = DSW_PMD_NAME, + .max_event_queues = DSW_MAX_QUEUES, + .max_event_queue_flows = DSW_MAX_FLOWS, + .max_event_queue_priority_levels = 1, + .max_event_priority_levels = 1, + .max_event_ports = DSW_MAX_PORTS, + .max_event_port_dequeue_depth = DSW_MAX_PORT_DEQUEUE_DEPTH, + .max_event_port_enqueue_depth = DSW_MAX_PORT_ENQUEUE_DEPTH, + .max_num_events = DSW_MAX_EVENTS, + .event_dev_cap = RTE_EVENT_DEV_CAP_BURST_MODE| + RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED + }; +} + +static int +dsw_configure(const struct rte_eventdev *dev) +{ + struct dsw_evdev *dsw = dsw_pmd_priv(dev); + const struct rte_event_dev_config *conf = &dev->data->dev_conf; + + dsw->num_queues = conf->nb_event_queues; + + return 0; +} + +static struct rte_eventdev_ops dsw_evdev_ops = { + .queue_setup = dsw_queue_setup, + .queue_def_conf = dsw_queue_def_conf, + .queue_release = dsw_queue_release, + .dev_infos_get = dsw_info_get, + .dev_configure = dsw_configure, +}; + static int dsw_probe(struct rte_vdev_device *vdev) { @@ -23,6 +108,8 @@ dsw_probe(struct rte_vdev_device *vdev) if (dev == NULL) return -EFAULT; + dev->dev_ops = &dsw_evdev_ops; + if (rte_eal_process_type() != RTE_PROC_PRIMARY) return 0; diff --git a/drivers/event/dsw/dsw_evdev.h b/drivers/event/dsw/dsw_evdev.h index 9a0f4c357..5eda8d114 100644 --- a/drivers/event/dsw/dsw_evdev.h +++ b/drivers/event/dsw/dsw_evdev.h @@ -9,8 +9,36 @@ #define DSW_PMD_NAME RTE_STR(event_dsw) +/* Code changes are required to allow more ports. */ +#define DSW_MAX_PORTS (64) +#define DSW_MAX_PORT_DEQUEUE_DEPTH (128) +#define DSW_MAX_PORT_ENQUEUE_DEPTH (128) + +#define DSW_MAX_QUEUES (16) + +#define DSW_MAX_EVENTS (16384) + +/* Code changes are required to allow more flows than 32k. */ +#define DSW_MAX_FLOWS_BITS (15) +#define DSW_MAX_FLOWS (1<<(DSW_MAX_FLOWS_BITS)) +#define DSW_MAX_FLOWS_MASK (DSW_MAX_FLOWS-1) + +struct dsw_queue { + uint8_t schedule_type; + uint16_t num_serving_ports; +}; + struct dsw_evdev { struct rte_eventdev_data *data; + + struct dsw_queue queues[DSW_MAX_QUEUES]; + uint8_t num_queues; }; +static inline struct dsw_evdev * +dsw_pmd_priv(const struct rte_eventdev *eventdev) +{ + return eventdev->data->dev_private; +} + #endif