From patchwork Mon Sep 10 09:33:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 44501 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EB2AA1B009; Mon, 10 Sep 2018 11:34:45 +0200 (CEST) Received: from dispatch1-us1.ppe-hosted.com (dispatch1-us1.ppe-hosted.com [67.231.154.164]) by dpdk.org (Postfix) with ESMTP id 1A69F4CA1 for ; Mon, 10 Sep 2018 11:33:55 +0200 (CEST) X-Virus-Scanned: Proofpoint Essentials engine Received: from webmail.solarflare.com (webmail.solarflare.com [12.187.104.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits)) (No client certificate requested) by mx1-us1.ppe-hosted.com (Proofpoint Essentials ESMTP Server) with ESMTPS id 665B0780055 for ; Mon, 10 Sep 2018 09:33:54 +0000 (UTC) Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 10 Sep 2018 02:33:48 -0700 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Mon, 10 Sep 2018 02:33:48 -0700 Received: from ukv-loginhost.uk.solarflarecom.com (ukv-loginhost.uk.solarflarecom.com [10.17.10.39]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id w8A9XlJJ023870; Mon, 10 Sep 2018 10:33:47 +0100 Received: from ukv-loginhost.uk.solarflarecom.com (localhost [127.0.0.1]) by ukv-loginhost.uk.solarflarecom.com (Postfix) with ESMTP id E3ECF1626D1; Mon, 10 Sep 2018 10:33:46 +0100 (BST) From: Andrew Rybchenko To: CC: Vijay Srivastava Date: Mon, 10 Sep 2018 10:33:29 +0100 Message-ID: <1536572016-18134-31-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1536572016-18134-1-git-send-email-arybchenko@solarflare.com> References: <1536572016-18134-1-git-send-email-arybchenko@solarflare.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-12.5.0.1300-8.5.1010-24084.005 X-TM-AS-Result: No-0.063800-4.000000-10 X-TMASE-MatchedRID: jW2Old1ajwBf2oN5IGbAjgPZZctd3P4BWjWsWQUWzVoOjbYPPrAZXCad 94HWeHMSOfAiJ/eonC1mJS6k736MTLQDrl6zjfI2WuD7rjDvQciWhTvVy2NdlJ0Koq3EzpuHd/f gGgoXNwfe4MFqtgcR//I3oTIsmVRNF7IWNThMK4dWeFNzK1vl0qcJxWZ5/lR8p+cg3PT8JVw86a y9NNiI8eLzNWBegCW2wgn7iDBesS0qyYS0oyUVZnwvHE5fonBJEgSTIJdWlhBql/DsVDZa0hgOY 0ZunxUT+8zzNvCKk7XY+JOJcECYwmPXCPbKMwBq7MYkxbqFHioMoGKh3pNj671NuKS30BZnQIFI ZLtsgG0DUH+nVLNyiCsqIP9TxvtJo1s8kG68toueqD9WtJkSIw== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10-0.063800-4.000000 X-TMASE-Version: SMEX-12.5.0.1300-8.5.1010-24084.005 X-MDID: 1536572035-a7jtwkd4m6k4 Subject: [dpdk-dev] [PATCH 30/37] net/sfc/base: add support to get active FEC type X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vijay Srivastava Signed-off-by: Vijay Srivastava Signed-off-by: Andrew Rybchenko --- drivers/net/sfc/base/ef10_impl.h | 6 ++++ drivers/net/sfc/base/ef10_phy.c | 60 +++++++++++++++++++++++++++++--- drivers/net/sfc/base/efx.h | 11 ++++++ drivers/net/sfc/base/efx_impl.h | 1 + drivers/net/sfc/base/efx_phy.c | 39 ++++++++++++++++++++- 5 files changed, 111 insertions(+), 6 deletions(-) diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h index 2819ae6ed..b72e7d256 100644 --- a/drivers/net/sfc/base/ef10_impl.h +++ b/drivers/net/sfc/base/ef10_impl.h @@ -596,6 +596,7 @@ typedef struct ef10_link_state_s { uint32_t els_adv_cap_mask; uint32_t els_lp_cap_mask; unsigned int els_fcntl; + efx_phy_fec_type_t els_fec; efx_link_mode_t els_link_mode; #if EFSYS_OPT_LOOPBACK efx_loopback_type_t els_loopback; @@ -632,6 +633,11 @@ ef10_phy_oui_get( __in efx_nic_t *enp, __out uint32_t *ouip); +extern __checkReturn efx_rc_t +ef10_phy_fec_type_get( + __in efx_nic_t *enp, + __out efx_phy_fec_type_t *fecp); + #if EFSYS_OPT_PHY_STATS extern __checkReturn efx_rc_t diff --git a/drivers/net/sfc/base/ef10_phy.c b/drivers/net/sfc/base/ef10_phy.c index a1f59ff1c..ec3600e96 100644 --- a/drivers/net/sfc/base/ef10_phy.c +++ b/drivers/net/sfc/base/ef10_phy.c @@ -98,8 +98,10 @@ mcdi_phy_decode_link_mode( __in uint32_t link_flags, __in unsigned int speed, __in unsigned int fcntl, + __in uint32_t fec, __out efx_link_mode_t *link_modep, - __out unsigned int *fcntlp) + __out unsigned int *fcntlp, + __out efx_phy_fec_type_t *fecp) { boolean_t fd = !!(link_flags & (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN)); @@ -141,6 +143,22 @@ mcdi_phy_decode_link_mode( EFSYS_PROBE1(mc_pcol_error, int, fcntl); *fcntlp = 0; } + + switch (fec) { + case MC_CMD_FEC_NONE: + *fecp = EFX_PHY_FEC_NONE; + break; + case MC_CMD_FEC_BASER: + *fecp = EFX_PHY_FEC_BASER; + break; + case MC_CMD_FEC_RS: + *fecp = EFX_PHY_FEC_RS; + break; + default: + EFSYS_PROBE1(mc_pcol_error, int, fec); + *fecp = EFX_PHY_FEC_NONE; + break; + } } @@ -154,6 +172,7 @@ ef10_phy_link_ev( unsigned int link_flags; unsigned int speed; unsigned int fcntl; + efx_phy_fec_type_t fec = MC_CMD_FEC_NONE; efx_link_mode_t link_mode; uint32_t lp_cap_mask; @@ -191,7 +210,8 @@ ef10_phy_link_ev( link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS); mcdi_phy_decode_link_mode(enp, link_flags, speed, MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL), - &link_mode, &fcntl); + MC_CMD_FEC_NONE, &link_mode, + &fcntl, &fec); mcdi_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP), &lp_cap_mask); @@ -242,15 +262,16 @@ ef10_phy_get_link( __out ef10_link_state_t *elsp) { efx_mcdi_req_t req; + uint32_t fec; EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_LINK_IN_LEN, - MC_CMD_GET_LINK_OUT_LEN); + MC_CMD_GET_LINK_OUT_V2_LEN); efx_rc_t rc; req.emr_cmd = MC_CMD_GET_LINK; req.emr_in_buf = payload; req.emr_in_length = MC_CMD_GET_LINK_IN_LEN; req.emr_out_buf = payload; - req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN; + req.emr_out_length = MC_CMD_GET_LINK_OUT_V2_LEN; efx_mcdi_execute(enp, &req); @@ -269,10 +290,16 @@ ef10_phy_get_link( mcdi_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP), &elsp->els_lp_cap_mask); + if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_V2_LEN) + fec = MC_CMD_FEC_NONE; + else + fec = MCDI_OUT_DWORD(req, GET_LINK_OUT_V2_FEC_TYPE); + mcdi_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS), MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED), MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL), - &elsp->els_link_mode, &elsp->els_fcntl); + fec, &elsp->els_link_mode, + &elsp->els_fcntl, &elsp->els_fec); #if EFSYS_OPT_LOOPBACK /* @@ -515,6 +542,29 @@ ef10_phy_oui_get( return (ENOTSUP); } + __checkReturn efx_rc_t +ef10_phy_fec_type_get( + __in efx_nic_t *enp, + __out efx_phy_fec_type_t *fecp) +{ + efx_rc_t rc; + ef10_link_state_t els; + + /* Obtain the active FEC type */ + if ((rc = ef10_phy_get_link(enp, &els)) != 0) + goto fail1; + + *fecp = els.els_fec; + + return (0); + +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return (rc); +} + + #if EFSYS_OPT_PHY_STATS __checkReturn efx_rc_t diff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h index 15b3882dd..cc68f744e 100644 --- a/drivers/net/sfc/base/efx.h +++ b/drivers/net/sfc/base/efx.h @@ -3202,6 +3202,17 @@ efx_nic_set_fw_subvariant( #endif /* EFSYS_OPT_FW_SUBVARIANT_AWARE */ +typedef enum efx_phy_fec_type_e { + EFX_PHY_FEC_NONE = 0, + EFX_PHY_FEC_BASER, + EFX_PHY_FEC_RS +} efx_phy_fec_type_t; + +extern __checkReturn efx_rc_t +efx_phy_fec_type_get( + __in efx_nic_t *enp, + __out efx_phy_fec_type_t *typep); + #ifdef __cplusplus } #endif diff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h index 2c95571b1..9f44d2f64 100644 --- a/drivers/net/sfc/base/efx_impl.h +++ b/drivers/net/sfc/base/efx_impl.h @@ -224,6 +224,7 @@ typedef struct efx_phy_ops_s { efx_rc_t (*epo_reconfigure)(efx_nic_t *); efx_rc_t (*epo_verify)(efx_nic_t *); efx_rc_t (*epo_oui_get)(efx_nic_t *, uint32_t *); + efx_rc_t (*epo_fec_type_get)(efx_nic_t *, efx_phy_fec_type_t *); #if EFSYS_OPT_PHY_STATS efx_rc_t (*epo_stats_update)(efx_nic_t *, efsys_mem_t *, uint32_t *); diff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c index ba2f51c17..7c341e429 100644 --- a/drivers/net/sfc/base/efx_phy.c +++ b/drivers/net/sfc/base/efx_phy.c @@ -15,6 +15,7 @@ static const efx_phy_ops_t __efx_phy_siena_ops = { siena_phy_reconfigure, /* epo_reconfigure */ siena_phy_verify, /* epo_verify */ siena_phy_oui_get, /* epo_oui_get */ + NULL, /* epo_fec_type_get */ #if EFSYS_OPT_PHY_STATS siena_phy_stats_update, /* epo_stats_update */ #endif /* EFSYS_OPT_PHY_STATS */ @@ -34,6 +35,7 @@ static const efx_phy_ops_t __efx_phy_ef10_ops = { ef10_phy_reconfigure, /* epo_reconfigure */ ef10_phy_verify, /* epo_verify */ ef10_phy_oui_get, /* epo_oui_get */ + ef10_phy_fec_type_get, /* epo_fec_type_get */ #if EFSYS_OPT_PHY_STATS ef10_phy_stats_update, /* epo_stats_update */ #endif /* EFSYS_OPT_PHY_STATS */ @@ -190,6 +192,11 @@ efx_phy_adv_cap_get( } } +#define EFX_PHY_CAP_FEC_REQ_MASK \ + (1U << EFX_PHY_CAP_BASER_FEC_REQUESTED) | \ + (1U << EFX_PHY_CAP_RS_FEC_REQUESTED) | \ + (1U << EFX_PHY_CAP_25G_BASER_FEC_REQUESTED) + __checkReturn efx_rc_t efx_phy_adv_cap_set( __in efx_nic_t *enp, @@ -203,7 +210,8 @@ efx_phy_adv_cap_set( EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT); - if ((mask & ~epp->ep_phy_cap_mask) != 0) { + /* Ignore don't care bits of FEC (FEC EFX_PHY_CAP_*_REQUESTED) */ + if ((mask & ~(epp->ep_phy_cap_mask | EFX_PHY_CAP_FEC_REQ_MASK)) != 0) { rc = ENOTSUP; goto fail1; } @@ -306,6 +314,35 @@ efx_phy_module_get_info( return (0); +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return (rc); +} + + __checkReturn efx_rc_t +efx_phy_fec_type_get( + __in efx_nic_t *enp, + __out efx_phy_fec_type_t *typep) +{ + efx_port_t *epp = &(enp->en_port); + const efx_phy_ops_t *epop = epp->ep_epop; + efx_rc_t rc; + + EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); + + if (epop->epo_fec_type_get == NULL) { + rc = ENOTSUP; + goto fail1; + } + + if ((rc = epop->epo_fec_type_get(enp, typep)) != 0) + goto fail2; + + return (0); + fail2: EFSYS_PROBE(fail2); fail1: