From patchwork Tue Sep 4 13:49:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Duszynski X-Patchwork-Id: 44239 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 315D1231E; Tue, 4 Sep 2018 15:49:25 +0200 (CEST) Received: from mail-lf1-f67.google.com (mail-lf1-f67.google.com [209.85.167.67]) by dpdk.org (Postfix) with ESMTP id A82CA1BE0 for ; Tue, 4 Sep 2018 15:49:23 +0200 (CEST) Received: by mail-lf1-f67.google.com with SMTP id m26-v6so3037708lfb.0 for ; Tue, 04 Sep 2018 06:49:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=y8U6gYDQP9+l7c5h3ZcJ0DaVjlhx9ObAKd++8V34sQU=; b=jqiD4oTvNWQ5qwY+rPbcj3EFsPzhBD4O+LrJ5yPbu7I5p/uJpT3gsBXgMFZBcB80f7 FwwJvcoMJ88lu2pUXEmbaT7hceTpiSs4WoezELG3YoKYC/pDHUIlON5gM3oLapKHu3ty qDA092Mi528pXXYaqBNJtoZE5I8wcQDWEe4agkgRJAvfvuHUKEC/W5zkN2I5xwtP56Aq uncJCvcppJd6AzPYrf4JNB//HhwUb773hNPhyYDnM1yI1PBj3fvt/w6dnxams8po3u3a BcniKTysqo2YnPLCYWulY1mmlwY9x9QfgkjmJbYUt2Vk8t2dHW207/uzJcDMa8eKtUTx 5cHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=y8U6gYDQP9+l7c5h3ZcJ0DaVjlhx9ObAKd++8V34sQU=; b=pQ7jXW3+k9UayYUr/x1DUiVO9O1m6+rGJqLtJWGrfAoRq8CMJNO9v1BIghNvp33NYj SrGHiGMTMfSHUo4jSOo8q0ejic55tNQChcqDYJjk6/K5fDFCu8xLXGSA6k1jant9g+MK FKAl0gGtXHPDeO+ok1/mFSAJ8uql5wTJoouaKbNZ90I+K5KWUmZZ/KPQsudStoxhgMyl K2KdqVnddNo2RCpe7TMwLoBK9/hedkRtpFRDB7kdBNbJ/Wy1eJncEJNZQZt0Oc6+WRhs lnHHvXM89niWLDxdrg8pn1H6S9EXWT9W4iudv+W9xYZarAlAqFI46jX6rY5nxjI4JKQH /UtQ== X-Gm-Message-State: APzg51AynR+Kj9nTI2U9qthhdjgrSh8E4WJ9ZrGQtamqPE062wLgbCTw oEsor00pqyA37OumFMHaXVw2vSARwSaqwQ== X-Google-Smtp-Source: ANB0VdYqSzD6WDnVwUGvBQDDwLRN2ZRcmCgVkRFEWlFzJaf2TGAGCXmTeh8PUSB7l0VZbK3DQs8+GA== X-Received: by 2002:a19:1a52:: with SMTP id a79-v6mr9261997lfa.139.1536068963134; Tue, 04 Sep 2018 06:49:23 -0700 (PDT) Received: from sh.semihalf.local (31-172-191-173.noc.fibertech.net.pl. [31.172.191.173]) by smtp.gmail.com with ESMTPSA id q22-v6sm4057225lff.10.2018.09.04.06.49.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 04 Sep 2018 06:49:22 -0700 (PDT) From: Tomasz Duszynski To: dev@dpdk.org Cc: nsamsono@marvell.com, mw@semihalf.com Date: Tue, 4 Sep 2018 15:49:02 +0200 Message-Id: <1536068953-9352-2-git-send-email-tdu@semihalf.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536068953-9352-1-git-send-email-tdu@semihalf.com> References: <1536045016-32008-1-git-send-email-tdu@semihalf.com> <1536068953-9352-1-git-send-email-tdu@semihalf.com> Subject: [dpdk-dev] [PATCH v2 01/12] net/mvpp2: initialize ppio only once X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Natalie Samsonov This changes stop/start/configure behavior due to issue in MUSDK library itself. From now on, ppio can be reconfigured only after interface is closed. Signed-off-by: Natalie Samsonov Reviewed-by: Yuval Caduri --- drivers/net/mvpp2/mrvl_ethdev.c | 53 +++++++++++++++++++++++++---------------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c index 6824445..f022cad 100644 --- a/drivers/net/mvpp2/mrvl_ethdev.c +++ b/drivers/net/mvpp2/mrvl_ethdev.c @@ -304,6 +304,11 @@ mrvl_dev_configure(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; int ret; + if (priv->ppio) { + MRVL_LOG(INFO, "Device reconfiguration is not supported"); + return -EINVAL; + } + if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_NONE && dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) { MRVL_LOG(INFO, "Unsupported rx multi queue mode %d", @@ -525,6 +530,9 @@ mrvl_dev_start(struct rte_eth_dev *dev) char match[MRVL_MATCH_LEN]; int ret = 0, i, def_init_size; + if (priv->ppio) + return mrvl_dev_set_link_up(dev); + snprintf(match, sizeof(match), "ppio-%d:%d", priv->pp_id, priv->ppio_id); priv->ppio_params.match = match; @@ -749,28 +757,7 @@ mrvl_flush_bpool(struct rte_eth_dev *dev) static void mrvl_dev_stop(struct rte_eth_dev *dev) { - struct mrvl_priv *priv = dev->data->dev_private; - mrvl_dev_set_link_down(dev); - mrvl_flush_rx_queues(dev); - mrvl_flush_tx_shadow_queues(dev); - if (priv->cls_tbl) { - pp2_cls_tbl_deinit(priv->cls_tbl); - priv->cls_tbl = NULL; - } - if (priv->qos_tbl) { - pp2_cls_qos_tbl_deinit(priv->qos_tbl); - priv->qos_tbl = NULL; - } - if (priv->ppio) - pp2_ppio_deinit(priv->ppio); - priv->ppio = NULL; - - /* policer must be released after ppio deinitialization */ - if (priv->policer) { - pp2_cls_plcr_deinit(priv->policer); - priv->policer = NULL; - } } /** @@ -785,6 +772,9 @@ mrvl_dev_close(struct rte_eth_dev *dev) struct mrvl_priv *priv = dev->data->dev_private; size_t i; + mrvl_flush_rx_queues(dev); + mrvl_flush_tx_shadow_queues(dev); + for (i = 0; i < priv->ppio_params.inqs_params.num_tcs; ++i) { struct pp2_ppio_tc_params *tc_params = &priv->ppio_params.inqs_params.tcs_params[i]; @@ -795,7 +785,28 @@ mrvl_dev_close(struct rte_eth_dev *dev) } } + if (priv->cls_tbl) { + pp2_cls_tbl_deinit(priv->cls_tbl); + priv->cls_tbl = NULL; + } + + if (priv->qos_tbl) { + pp2_cls_qos_tbl_deinit(priv->qos_tbl); + priv->qos_tbl = NULL; + } + mrvl_flush_bpool(dev); + + if (priv->ppio) { + pp2_ppio_deinit(priv->ppio); + priv->ppio = NULL; + } + + /* policer must be released after ppio deinitialization */ + if (priv->policer) { + pp2_cls_plcr_deinit(priv->policer); + priv->policer = NULL; + } } /**