From patchwork Wed Jun 13 12:13:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Jozwiak X-Patchwork-Id: 41034 X-Patchwork-Delegate: pablo.de.lara.guarch@intel.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 325BB1EC75; Wed, 13 Jun 2018 14:14:30 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id AB17E1D992 for ; Wed, 13 Jun 2018 14:14:27 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2018 05:14:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,218,1526367600"; d="scan'208";a="63727633" Received: from tjozwiax-mobl.ger.corp.intel.com (HELO localhost.localdomain) ([10.103.104.42]) by fmsmga001.fm.intel.com with ESMTP; 13 Jun 2018 05:14:25 -0700 From: Tomasz Jozwiak To: fiona.trahe@intel.com, tomaszx.jozwiak@intel.com, dev@dpdk.org Date: Wed, 13 Jun 2018 14:13:45 +0200 Message-Id: <1528892062-4997-2-git-send-email-tomaszx.jozwiak@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com> References: <1523040732-3290-1-git-send-email-fiona.trahe@intel.com> <1528892062-4997-1-git-send-email-tomaszx.jozwiak@intel.com> Subject: [dpdk-dev] [PATCH v3 01/38] crypto/qat: add qat common header X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Fiona Trahe This commit adds qat_common.h header file. Following objects were moved to it: qat_algs.h =>. qat_common.h - struct qat_alg_buf - struct qat_alg_buf_list - struct qat_crypto_op_cookie - QAT_SGL_MAX_NUMBER qat_crypto.h => qat_common.h - CRYPTODEV_NAME_QAT_SYM_PMD Signed-off-by: ArkadiuszX Kusztal Signed-off-by: Fiona Trahe --- drivers/crypto/qat/qat_adf/qat_algs.h | 25 -------------- drivers/crypto/qat/qat_common.h | 47 +++++++++++++++++++++++++++ drivers/crypto/qat/qat_crypto.h | 9 +---- 3 files changed, 48 insertions(+), 33 deletions(-) create mode 100644 drivers/crypto/qat/qat_common.h diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h index 88bd5f00e..6c49c6529 100644 --- a/drivers/crypto/qat/qat_adf/qat_algs.h +++ b/drivers/crypto/qat/qat_adf/qat_algs.h @@ -32,12 +32,6 @@ ICP_QAT_HW_CIPHER_KEY_CONVERT, \ ICP_QAT_HW_CIPHER_DECRYPT) -struct qat_alg_buf { - uint32_t len; - uint32_t resrvd; - uint64_t addr; -} __rte_packed; - enum qat_crypto_proto_flag { QAT_CRYPTO_PROTO_FLAG_NONE = 0, QAT_CRYPTO_PROTO_FLAG_CCM = 1, @@ -46,25 +40,6 @@ enum qat_crypto_proto_flag { QAT_CRYPTO_PROTO_FLAG_ZUC = 4 }; -/* - * Maximum number of SGL entries - */ -#define QAT_SGL_MAX_NUMBER 16 - -struct qat_alg_buf_list { - uint64_t resrvd; - uint32_t num_bufs; - uint32_t num_mapped_bufs; - struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER]; -} __rte_packed __rte_cache_aligned; - -struct qat_crypto_op_cookie { - struct qat_alg_buf_list qat_sgl_list_src; - struct qat_alg_buf_list qat_sgl_list_dst; - rte_iova_t qat_sgl_src_phys_addr; - rte_iova_t qat_sgl_dst_phys_addr; -}; - /* Common content descriptor */ struct qat_alg_cd { struct icp_qat_hw_cipher_algo_blk cipher; diff --git a/drivers/crypto/qat/qat_common.h b/drivers/crypto/qat/qat_common.h new file mode 100644 index 000000000..293b6f700 --- /dev/null +++ b/drivers/crypto/qat/qat_common.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2018 Intel Corporation + */ +#ifndef _QAT_COMMON_H_ +#define _QAT_COMMON_H_ + +#include + +/**< Intel(R) QAT Symmetric Crypto PMD device name */ +#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat + +/* + * Maximum number of SGL entries + */ +#define QAT_SGL_MAX_NUMBER 16 + +/* Intel(R) QuickAssist Technology device generation is enumerated + * from one according to the generation of the device + */ + +enum qat_device_gen { + QAT_GEN1 = 1, + QAT_GEN2, +}; + +/**< Common struct for scatter-gather list operations */ +struct qat_alg_buf { + uint32_t len; + uint32_t resrvd; + uint64_t addr; +} __rte_packed; + +struct qat_alg_buf_list { + uint64_t resrvd; + uint32_t num_bufs; + uint32_t num_mapped_bufs; + struct qat_alg_buf bufers[QAT_SGL_MAX_NUMBER]; +} __rte_packed __rte_cache_aligned; + +struct qat_crypto_op_cookie { + struct qat_alg_buf_list qat_sgl_list_src; + struct qat_alg_buf_list qat_sgl_list_dst; + phys_addr_t qat_sgl_src_phys_addr; + phys_addr_t qat_sgl_dst_phys_addr; +}; + +#endif /* _QAT_QAT_COMMON_H_ */ diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h index 281a142b9..5190d25e5 100644 --- a/drivers/crypto/qat/qat_crypto.h +++ b/drivers/crypto/qat/qat_crypto.h @@ -8,11 +8,9 @@ #include #include +#include "qat_common.h" #include "qat_crypto_capabilities.h" -#define CRYPTODEV_NAME_QAT_SYM_PMD crypto_qat -/**< Intel QAT Symmetric Crypto PMD device name */ - /* * This macro rounds up a number to a be a multiple of * the alignment when the alignment is a power of 2 @@ -30,11 +28,6 @@ struct qat_session; -enum qat_device_gen { - QAT_GEN1 = 1, - QAT_GEN2, -}; - /** * Structure associated with each queue. */