From patchwork Mon Nov 6 01:41:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Monjalon X-Patchwork-Id: 31193 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D6A831B2E3; Mon, 6 Nov 2017 02:42:26 +0100 (CET) Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by dpdk.org (Postfix) with ESMTP id 022F11B290 for ; Mon, 6 Nov 2017 02:42:22 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id A80C820C08; Sun, 5 Nov 2017 20:42:21 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Sun, 05 Nov 2017 20:42:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=tptcv+/9WK7aFd qs+vz47w3PloiS+7M2wqHGZ9vvkDM=; b=Rn3wpozaCxTQPrXyDbBQBuOR+OVaxL iVyNLAurgFaH9+eMAW/4VVQiUM0DZAWyZs9m3hZoi13xYiFxdQhoG3qks2eqs/gx d8BDqUQVWcK935SG7a8a0xffBF4uLyvkzPSo4KDYV/vUcXx/APOiGd5vb1J8Bq/P kom7c4bTuJKzg= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=tptcv+/9WK7aFdqs+vz47w3PloiS+7M2wqHGZ9vvkDM=; b=FCVto2jm ZTuMjoRoKTHeWeH4ehVXtS6KBkELudS6b4TnMr5E7KChmMsRtjI2HAlWHwwFONBr lCiTiEnhr2ycaMgDJjVUw1f3X3GoWqHTqxdXAqODplWLK3AF15z39CGz3YhxKZj3 SOqTHNTdev//zm/GZ4uOj6BojvlC8lXQhqw8ZCstlVJJ+SiDsmkh9AUKyshhQvNq WXaoj/im7JdslYtEhS3GBC6UD1n6zypmYJRouId2KBZCMykZn3hbHPEZ1l8UZOiG wwbJ5cqvLNeP4qPtZHNFX4rHgkGXd8pj8nKM/JUdp1eMh5HrjRFCA74At7M2pkXZ u+4aRWFcSvf0wQ== X-ME-Sender: Received: from xps.monjalon.net (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id DEA862469F; Sun, 5 Nov 2017 20:42:20 -0500 (EST) From: Thomas Monjalon To: Santosh Shukla Cc: olivier.matz@6wind.com, sergio.gonzalez.monroy@intel.com, anatoly.burakov@intel.com, dev@dpdk.org Date: Mon, 6 Nov 2017 02:41:39 +0100 Message-Id: <20171106014141.13266-14-thomas@monjalon.net> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171106014141.13266-1-thomas@monjalon.net> References: <20170814151537.29454-1-santosh.shukla@caviumnetworks.com> <20171106014141.13266-1-thomas@monjalon.net> Subject: [dpdk-dev] [PATCH v4 13/15] cryptodev: rename physical address type to IOVA X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Santosh Shukla Renamed data type from phys_addr_t to rte_iova_t. Signed-off-by: Santosh Shukla Reviewed-by: Anatoly Burakov Signed-off-by: Thomas Monjalon --- app/test-crypto-perf/cperf_test_common.c | 2 +- app/test-crypto-perf/cperf_test_vectors.h | 4 ++-- doc/guides/prog_guide/cryptodev_lib.rst | 6 +++--- drivers/crypto/dpaa_sec/dpaa_sec.c | 18 +++++++++--------- drivers/crypto/qat/qat_adf/qat_algs.h | 6 +++--- drivers/crypto/qat/qat_crypto.c | 2 +- drivers/crypto/qat/qat_crypto.h | 2 +- examples/l2fwd-crypto/main.c | 2 +- lib/librte_cryptodev/rte_crypto.h | 2 +- lib/librte_cryptodev/rte_crypto_sym.h | 6 +++--- lib/librte_cryptodev/rte_cryptodev.h | 2 +- test/test/test_cryptodev.h | 2 +- 12 files changed, 27 insertions(+), 27 deletions(-) diff --git a/app/test-crypto-perf/cperf_test_common.c b/app/test-crypto-perf/cperf_test_common.c index 84c5a3d76..a95899a3f 100644 --- a/app/test-crypto-perf/cperf_test_common.c +++ b/app/test-crypto-perf/cperf_test_common.c @@ -74,7 +74,7 @@ fill_multi_seg_mbuf(struct rte_mbuf *m, struct rte_mempool *mp, uint16_t mbuf_hdr_size = sizeof(struct rte_mbuf); uint16_t remaining_segments = segments_nb; struct rte_mbuf *next_mbuf; - phys_addr_t next_seg_phys_addr = rte_mempool_virt2iova(obj) + + rte_iova_t next_seg_phys_addr = rte_mempool_virt2iova(obj) + mbuf_offset + mbuf_hdr_size; do { diff --git a/app/test-crypto-perf/cperf_test_vectors.h b/app/test-crypto-perf/cperf_test_vectors.h index 85955703c..cb5d82845 100644 --- a/app/test-crypto-perf/cperf_test_vectors.h +++ b/app/test-crypto-perf/cperf_test_vectors.h @@ -78,13 +78,13 @@ struct cperf_test_vector { struct { uint8_t *data; - phys_addr_t phys_addr; + rte_iova_t phys_addr; uint16_t length; } aad; struct { uint8_t *data; - phys_addr_t phys_addr; + rte_iova_t phys_addr; uint16_t length; } digest; diff --git a/doc/guides/prog_guide/cryptodev_lib.rst b/doc/guides/prog_guide/cryptodev_lib.rst index 75ae085f6..2b338b926 100644 --- a/doc/guides/prog_guide/cryptodev_lib.rst +++ b/doc/guides/prog_guide/cryptodev_lib.rst @@ -539,12 +539,12 @@ chain. struct { uint8_t *data; - phys_addr_t phys_addr; + rte_iova_t phys_addr; } digest; /**< Digest parameters */ struct { uint8_t *data; - phys_addr_t phys_addr; + rte_iova_t phys_addr; } aad; /**< Additional authentication parameters */ } aead; @@ -566,7 +566,7 @@ chain. struct { uint8_t *data; - phys_addr_t phys_addr; + rte_iova_t phys_addr; } digest; /**< Digest parameters */ } auth; }; diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c index 1d9d03aaa..d1ef241aa 100644 --- a/drivers/crypto/dpaa_sec/dpaa_sec.c +++ b/drivers/crypto/dpaa_sec/dpaa_sec.c @@ -110,7 +110,7 @@ dpaa_sec_alloc_ctx(dpaa_sec_session *ses) return ctx; } -static inline phys_addr_t +static inline rte_iova_t dpaa_mem_vtop(void *vaddr) { const struct rte_memseg *memseg = rte_eal_get_physmem_layout(); @@ -124,14 +124,14 @@ dpaa_mem_vtop(void *vaddr) paddr = memseg[i].phys_addr + (vaddr_64 - memseg[i].addr_64); - return (phys_addr_t)paddr; + return (rte_iova_t)paddr; } } - return (phys_addr_t)(NULL); + return (rte_iova_t)(NULL); } static inline void * -dpaa_mem_ptov(phys_addr_t paddr) +dpaa_mem_ptov(rte_iova_t paddr) { const struct rte_memseg *memseg = rte_eal_get_physmem_layout(); int i; @@ -158,7 +158,7 @@ ern_sec_fq_handler(struct qman_portal *qm __rte_unused, * all the packets in this queue could be dispatched into caam */ static int -dpaa_sec_init_rx(struct qman_fq *fq_in, phys_addr_t hwdesc, +dpaa_sec_init_rx(struct qman_fq *fq_in, rte_iova_t hwdesc, uint32_t fqid_out) { struct qm_mcc_initfq fq_opts; @@ -566,7 +566,7 @@ build_auth_only(struct rte_crypto_op *op, dpaa_sec_session *ses) struct dpaa_sec_job *cf; struct dpaa_sec_op_ctx *ctx; struct qm_sg_entry *sg; - phys_addr_t start_addr; + rte_iova_t start_addr; uint8_t *old_digest; ctx = dpaa_sec_alloc_ctx(ses); @@ -626,7 +626,7 @@ build_cipher_only(struct rte_crypto_op *op, dpaa_sec_session *ses) struct dpaa_sec_job *cf; struct dpaa_sec_op_ctx *ctx; struct qm_sg_entry *sg; - phys_addr_t src_start_addr, dst_start_addr; + rte_iova_t src_start_addr, dst_start_addr; uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *, ses->iv.offset); @@ -682,7 +682,7 @@ build_cipher_auth_gcm(struct rte_crypto_op *op, dpaa_sec_session *ses) struct dpaa_sec_op_ctx *ctx; struct qm_sg_entry *sg; uint32_t length = 0; - phys_addr_t src_start_addr, dst_start_addr; + rte_iova_t src_start_addr, dst_start_addr; uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *, ses->iv.offset); @@ -793,7 +793,7 @@ build_cipher_auth(struct rte_crypto_op *op, dpaa_sec_session *ses) struct dpaa_sec_job *cf; struct dpaa_sec_op_ctx *ctx; struct qm_sg_entry *sg; - phys_addr_t src_start_addr, dst_start_addr; + rte_iova_t src_start_addr, dst_start_addr; uint32_t length = 0; uint8_t *IV_ptr = rte_crypto_op_ctod_offset(op, uint8_t *, ses->iv.offset); diff --git a/drivers/crypto/qat/qat_adf/qat_algs.h b/drivers/crypto/qat/qat_adf/qat_algs.h index 2c8e03c0a..802ba95d1 100644 --- a/drivers/crypto/qat/qat_adf/qat_algs.h +++ b/drivers/crypto/qat/qat_adf/qat_algs.h @@ -104,8 +104,8 @@ struct qat_alg_buf_list { struct qat_crypto_op_cookie { struct qat_alg_buf_list qat_sgl_list_src; struct qat_alg_buf_list qat_sgl_list_dst; - phys_addr_t qat_sgl_src_phys_addr; - phys_addr_t qat_sgl_dst_phys_addr; + rte_iova_t qat_sgl_src_phys_addr; + rte_iova_t qat_sgl_dst_phys_addr; }; /* Common content descriptor */ @@ -124,7 +124,7 @@ struct qat_session { void *bpi_ctx; struct qat_alg_cd cd; uint8_t *cd_cur_ptr; - phys_addr_t cd_paddr; + rte_iova_t cd_paddr; struct icp_qat_fw_la_bulk_req fw_req; uint8_t aad_len; struct qat_crypto_instance *inst; diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c index 60148416b..a572967c4 100644 --- a/drivers/crypto/qat/qat_crypto.c +++ b/drivers/crypto/qat/qat_crypto.c @@ -1376,7 +1376,7 @@ qat_write_hw_desc_entry(struct rte_crypto_op *op, uint8_t *out_msg, * This address may used for setting AAD physical pointer * into IV offset from op */ - phys_addr_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr; + rte_iova_t aad_phys_addr_aead = op->sym->aead.aad.phys_addr; if (ctx->qat_hash_alg == ICP_QAT_HW_AUTH_ALGO_GALOIS_128 || ctx->qat_hash_alg == diff --git a/drivers/crypto/qat/qat_crypto.h b/drivers/crypto/qat/qat_crypto.h index 0ebb08349..c64d7756c 100644 --- a/drivers/crypto/qat/qat_crypto.h +++ b/drivers/crypto/qat/qat_crypto.h @@ -70,7 +70,7 @@ enum qat_device_gen { struct qat_queue { char memz_name[RTE_MEMZONE_NAMESIZE]; void *base_addr; /* Base address */ - phys_addr_t base_phys_addr; /* Queue physical address */ + rte_iova_t base_phys_addr; /* Queue physical address */ uint32_t head; /* Shadow copy of the head */ uint32_t tail; /* Shadow copy of the tail */ uint32_t modulo; diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c index b97367944..8c625edd1 100644 --- a/examples/l2fwd-crypto/main.c +++ b/examples/l2fwd-crypto/main.c @@ -140,7 +140,7 @@ enum l2fwd_crypto_xform_chain { struct l2fwd_key { uint8_t *data; uint32_t length; - phys_addr_t phys_addr; + rte_iova_t phys_addr; }; struct l2fwd_iv { diff --git a/lib/librte_cryptodev/rte_crypto.h b/lib/librte_cryptodev/rte_crypto.h index eeed9ee25..3d672fe7d 100644 --- a/lib/librte_cryptodev/rte_crypto.h +++ b/lib/librte_cryptodev/rte_crypto.h @@ -118,7 +118,7 @@ struct rte_crypto_op { struct rte_mempool *mempool; /**< crypto operation mempool which operation is allocated from */ - phys_addr_t phys_addr; + rte_iova_t phys_addr; /**< physical address of crypto operation */ RTE_STD_C11 diff --git a/lib/librte_cryptodev/rte_crypto_sym.h b/lib/librte_cryptodev/rte_crypto_sym.h index 599206370..c981f0b98 100644 --- a/lib/librte_cryptodev/rte_crypto_sym.h +++ b/lib/librte_cryptodev/rte_crypto_sym.h @@ -548,7 +548,7 @@ struct rte_crypto_sym_op { * For GCM (@ref RTE_CRYPTO_AEAD_AES_GCM), for * "digest result" read "authentication tag T". */ - phys_addr_t phys_addr; + rte_iova_t phys_addr; /**< Physical address of digest */ } digest; /**< Digest parameters */ struct { @@ -583,7 +583,7 @@ struct rte_crypto_sym_op { * of the block size (16 bytes). * */ - phys_addr_t phys_addr; /**< physical address */ + rte_iova_t phys_addr; /**< physical address */ } aad; /**< Additional authentication parameters */ } aead; @@ -680,7 +680,7 @@ struct rte_crypto_sym_op { * will overwrite any data at this location. * */ - phys_addr_t phys_addr; + rte_iova_t phys_addr; /**< Physical address of digest */ } digest; /**< Digest parameters */ } auth; diff --git a/lib/librte_cryptodev/rte_cryptodev.h b/lib/librte_cryptodev/rte_cryptodev.h index a0d3a12ab..a25bff9ba 100644 --- a/lib/librte_cryptodev/rte_cryptodev.h +++ b/lib/librte_cryptodev/rte_cryptodev.h @@ -110,7 +110,7 @@ extern const char **rte_cyptodev_names; * to calculate address from. */ #define rte_crypto_op_ctophys_offset(c, o) \ - (phys_addr_t)((c)->phys_addr + (o)) + (rte_iova_t)((c)->phys_addr + (o)) /** * Crypto parameters range description diff --git a/test/test/test_cryptodev.h b/test/test/test_cryptodev.h index e040b814f..bbdb91394 100644 --- a/test/test/test_cryptodev.h +++ b/test/test/test_cryptodev.h @@ -153,7 +153,7 @@ pktmbuf_mtod_offset(struct rte_mbuf *mbuf, int offset) { return rte_pktmbuf_mtod_offset(m, uint8_t *, offset); } -static inline phys_addr_t +static inline rte_iova_t pktmbuf_mtophys_offset(struct rte_mbuf *mbuf, int offset) { struct rte_mbuf *m;