From patchwork Fri Jan 20 13:53:50 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Rybchenko X-Patchwork-Id: 19837 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 243E837AC; Fri, 20 Jan 2017 14:54:27 +0100 (CET) Received: from nbfkord-smmo01.seg.att.com (nbfkord-smmo01.seg.att.com [209.65.160.76]) by dpdk.org (Postfix) with ESMTP id 7E0492BBD for ; Fri, 20 Jan 2017 14:54:05 +0100 (CET) Received: from unknown [12.187.104.26] (EHLO webmail.solarflare.com) by nbfkord-smmo01.seg.att.com(mxl_mta-7.2.4-7) with ESMTP id d7612885.2b393028c940.211188.00-2463.465663.nbfkord-smmo01.seg.att.com (envelope-from ); Fri, 20 Jan 2017 13:54:05 +0000 (UTC) X-MXL-Hash: 5882167d0e2f0352-22263b1a8cbf5952248b77a36978d2a52cd531bc Received: from unknown [12.187.104.26] (EHLO webmail.solarflare.com) by nbfkord-smmo01.seg.att.com(mxl_mta-7.2.4-7) over TLS secured channel with ESMTP id 57612885.0.211183.00-2333.465644.nbfkord-smmo01.seg.att.com (envelope-from ); Fri, 20 Jan 2017 13:53:58 +0000 (UTC) X-MXL-Hash: 588216760413a975-0b4c0d87dbaee7320263139cb26a095a5a4889a6 Received: from ocex03.SolarFlarecom.com (10.20.40.36) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25; Fri, 20 Jan 2017 05:53:55 -0800 Received: from opal.uk.solarflarecom.com (10.17.10.1) by ocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server (TLS) id 15.0.1044.25 via Frontend Transport; Fri, 20 Jan 2017 05:53:55 -0800 Received: from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com [10.17.10.10]) by opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id v0KDrrTm031846; Fri, 20 Jan 2017 13:53:53 GMT Received: from uklogin.uk.solarflarecom.com (localhost.localdomain [127.0.0.1]) by uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id v0KDrruJ005805; Fri, 20 Jan 2017 13:53:53 GMT From: Andrew Rybchenko To: CC: Jerin Jacob Date: Fri, 20 Jan 2017 13:53:50 +0000 Message-ID: <1484920431-5770-1-git-send-email-arybchenko@solarflare.com> X-Mailer: git-send-email 1.8.2.3 MIME-Version: 1.0 X-AnalysisOut: [v=2.1 cv=BNm12QkG c=1 sm=1 tr=0 a=8BlWFWvVlq5taO8ncb8nKg==] X-AnalysisOut: [:17 a=IgFoBzBjUZAA:10 a=zRKbQ67AAAAA:8 a=KPcTMC6hcW3mLvUbq] X-AnalysisOut: [JYA:9 a=PA03WX8tBzeizutn5_OT:22] X-Spam: [F=0.2000000000; CM=0.500; S=0.200(2015072901)] X-MAIL-FROM: X-SOURCE-IP: [12.187.104.26] Subject: [dpdk-dev] [PATCH 1/2] net/sfc: use eal I/O device memory read/write API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Use relaxed version of these functions to guarantee no changes on the step. Signed-off-by: Andrew Rybchenko --- Due to late stage when the API appears and small time for testing, I prefer conservative way: use relaxed version right now and cleanup neighbour rte_*mb() calls later with switching to non-relaxed versions. drivers/net/sfc/efsys.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/net/sfc/efsys.h b/drivers/net/sfc/efsys.h index fb2f3b5..a024b6c 100644 --- a/drivers/net/sfc/efsys.h +++ b/drivers/net/sfc/efsys.h @@ -43,6 +43,7 @@ #include #include #include +#include #include "sfc_debug.h" @@ -440,7 +441,7 @@ \ _addr = (volatile uint32_t *)(_base + (_offset)); \ rte_rmb(); \ - (_edp)->ed_u32[0] = _addr[0]; \ + (_edp)->ed_u32[0] = rte_read32_relaxed(_addr); \ \ EFSYS_PROBE2(bar_readd, unsigned int, (_offset), \ uint32_t, (_edp)->ed_u32[0]); \ @@ -463,7 +464,7 @@ \ _addr = (volatile uint64_t *)(_base + (_offset)); \ rte_rmb(); \ - (_eqp)->eq_u64[0] = _addr[0]; \ + (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr); \ \ EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \ uint32_t, (_eqp)->eq_u32[1], \ @@ -487,6 +488,7 @@ \ _addr = (volatile __m128i *)(_base + (_offset)); \ rte_rmb(); \ + /* There is no rte_read128_relaxed() yet */ \ (_eop)->eo_u128[0] = _addr[0]; \ \ EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \ @@ -518,7 +520,7 @@ uint32_t, (_edp)->ed_u32[0]); \ \ _addr = (volatile uint32_t *)(_base + (_offset)); \ - _addr[0] = (_edp)->ed_u32[0]; \ + rte_write32_relaxed((_edp)->ed_u32[0], _addr); \ rte_wmb(); \ \ _NOTE(CONSTANTCONDITION); \ @@ -542,7 +544,7 @@ uint32_t, (_eqp)->eq_u32[0]); \ \ _addr = (volatile uint64_t *)(_base + (_offset)); \ - _addr[0] = (_eqp)->eq_u64[0]; \ + rte_write64_relaxed((_eqp)->eq_u64[0], _addr); \ rte_wmb(); \ \ SFC_BAR_UNLOCK(_esbp); \ @@ -580,6 +582,7 @@ uint32_t, (_eop)->eo_u32[0]); \ \ _addr = (volatile __m128i *)(_base + (_offset)); \ + /* There is no rte_write128_relaxed() yet */ \ _addr[0] = (_eop)->eo_u128[0]; \ rte_wmb(); \ \