From patchwork Tue Nov 18 14:03:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yerden Zhumabekov X-Patchwork-Id: 1333 Return-Path: X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [IPv6:::1]) by dpdk.org (Postfix) with ESMTP id 338007F74; Tue, 18 Nov 2014 14:52:55 +0100 (CET) Received: from mgw.gov.kz (mgw.gov.kz [89.218.88.242]) by dpdk.org (Postfix) with ESMTP id 33BA47F30 for ; Tue, 18 Nov 2014 14:52:54 +0100 (CET) Received: from mgw.gov.kz (mx.ctsat.kz [178.89.4.95]) by mgw.gov.kz with ESMTP id sAIE3Dbj014333-sAIE3Dbl014333 (version=TLSv1.0 cipher=AES128-SHA bits=128 verify=NO); Tue, 18 Nov 2014 20:03:13 +0600 Received: from EXCASHUB2.rgp.local (192.168.40.53) by EdgeForefront.rgp.local (192.168.40.59) with Microsoft SMTP Server (TLS) id 14.2.247.3; Tue, 18 Nov 2014 20:03:02 +0600 Received: from r220.rgp.local (192.168.59.10) by excashub2.rgp.local (192.168.40.48) with Microsoft SMTP Server (TLS) id 14.2.247.3; Tue, 18 Nov 2014 20:03:24 +0600 From: Yerden Zhumabekov To: Date: Tue, 18 Nov 2014 20:03:40 +0600 Message-ID: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: <1409724351-23786-1-git-send-email-e_zhumabekov@sts.kz> MIME-Version: 1.0 X-Originating-IP: [192.168.59.10] X-FEAS-SYSTEM-WL: e_zhumabekov@sts.kz Subject: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32 implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Initially, SSE4.2 support is detected via CPUID instruction. Added rte_hash_crc_set_alg() function to detect and set CRC32 implementation if necessary. SSE4.2 is allowed by default. If it's not available, fall back to sw implementation. Best available algorithm is detected upon application startup through the constructor function rte_hash_crc_try_sse442(). Signed-off-by: Yerden Zhumabekov --- lib/librte_hash/rte_hash_crc.h | 53 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 51 insertions(+), 2 deletions(-) diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h index 15f687a..332ed99 100644 --- a/lib/librte_hash/rte_hash_crc.h +++ b/lib/librte_hash/rte_hash_crc.h @@ -45,7 +45,11 @@ extern "C" { #endif #include +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 #include +#endif +#include +#include /* Lookup tables for software implementation of CRC32C */ static uint32_t crc32c_tables[8][256] = {{ @@ -363,8 +367,41 @@ crc32c_2words(uint64_t data, uint32_t init_val) return crc; } +enum crc32_alg_t { + CRC32_SW = 0, + CRC32_SSE42 +}; + +static enum crc32_alg_t crc32_alg; + +/** + * Allow or disallow use of SSE4.2 instrinsics for CRC32 hash + * calculation. + * + * @param flag + * unsigned integer flag + * - (CRC32_SW) Don't use SSE4.2 intrinsics + * - (CRC32_SSE42) Use SSE4.2 intrinsics if available, set by default + */ +static inline void +rte_hash_crc_set_alg(enum crc32_alg_t alg) +{ + int sse42_supp = rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_2); + enum crc32_alg_t alg_supp = sse42_supp ? CRC32_SSE42 : CRC32_SW; + crc32_alg = (alg == CRC32_SSE42) ? alg_supp : CRC32_SW; +} + +/* Best available algorithm is detected via CPUID instruction */ +static inline void __attribute__((constructor)) +rte_hash_crc_try_sse42(void) +{ + rte_hash_crc_set_alg(CRC32_SSE42); +} + /** * Use single crc32 instruction to perform a hash on a 4 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported * * @param data * Data to perform hash on. @@ -376,11 +413,18 @@ crc32c_2words(uint64_t data, uint32_t init_val) static inline uint32_t rte_hash_crc_4byte(uint32_t data, uint32_t init_val) { - return _mm_crc32_u32(init_val, data); +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 + if (likely(crc32_alg == CRC32_SSE42)) + return _mm_crc32_u32(init_val, data); +#endif + + return crc32c_1word(data, init_val); } /** * Use single crc32 instruction to perform a hash on a 8 byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported * * @param data * Data to perform hash on. @@ -392,7 +436,12 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val) static inline uint32_t rte_hash_crc_8byte(uint64_t data, uint32_t init_val) { - return _mm_crc32_u64(init_val, data); +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2 + if (likely(crc32_alg == CRC32_SSE42)) + return _mm_crc32_u64(init_val, data); +#endif + + return crc32c_2words(data, init_val); } /**