From patchwork Fri Jul 17 10:14:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Yang X-Patchwork-Id: 74316 Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 3D5FCA053D; Fri, 17 Jul 2020 12:15:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DBD961BFBB; Fri, 17 Jul 2020 12:15:12 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id E95F01BFBA for ; Fri, 17 Jul 2020 12:15:10 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 46FFCD6E; Fri, 17 Jul 2020 03:15:10 -0700 (PDT) Received: from phil-VirtualBox.shanghai.arm.com (phil-VirtualBox.shanghai.arm.com [10.169.108.167]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 93F833F66E; Fri, 17 Jul 2020 03:15:06 -0700 (PDT) From: Phil Yang To: thomas@monjalon.net, dev@dpdk.org Cc: david.marchand@redhat.com, john.mcnamara@intel.com, Honnappa.Nagarahalli@arm.com, drc@linux.vnet.ibm.com, jerinj@marvell.com, konstantin.ananyev@intel.com, Ola.Liljedahl@arm.com, bruce.richardson@intel.com, Ruifeng.Wang@arm.com, nd@arm.com Date: Fri, 17 Jul 2020 18:14:34 +0800 Message-Id: <1594980877-26540-1-git-send-email-phil.yang@arm.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1594962519-20619-1-git-send-email-phil.yang@arm.com> References: <1594962519-20619-1-git-send-email-phil.yang@arm.com> Subject: [dpdk-dev] [PATCH v10 0/3] generic rte atomic APIs deprecate proposal X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" DPDK provides generic rte_atomic APIs to do several atomic operations. These APIs are using the deprecated __sync builtins and enforce full memory barriers on aarch64. However, full barriers are not necessary in many use cases. In order to address such use cases, C language offers C11 atomic APIs. The C11 atomic APIs provide finer memory barrier control by making use of the memory ordering parameter provided by the user. Various patches submitted in the past [2] and the patches in this series indicate significant performance gains on multiple aarch64 CPUs and no performance loss on x86. But the existing rte_atomic API implementations cannot be changed as the APIs do not take the memory ordering parameter. The only choice available is replacing the usage of the rte_atomic APIs with C11 atomic APIs. In order to make this change, the following steps are proposed: [1] deprecate rte_atomic APIs so that future patches do not use rte_atomic APIs (a script is added to flag the usages). [2] refactor the code that uses rte_atomic APIs to use c11 atomic APIs. This patchset contains: 1) changes to programmer guide describing writing efficient code for aarch64. 2) wraps up __atomic_thread_fence with explicit memory ordering parameter. 3) the checkpatch script changes to flag rte_atomicNN_xxx and rte_smp_[r/w]mb APIs usage in patches. v10: 1. Rearrange the second and third patches. (Thomas) 2. Refine commit log. (Thomas) v9: 1. Change built-ins to builtins. (David) 2. Flag all the new code which use rte_atomicNN_xx and rte_smp_[r/w]mb. (Thomas/Honnappa) 3. Simplify the warning output of the checkpatch script. (David) v8: Make descriptions more general. (Honnappa) v7: 1. Remove code blocks in the guidance. 2. Remove code reference links in the guidance. 3. Remove the update of C11 atomics maintainers. v6: Add check for rte_smp barriers APIs in the new code. v5: 1. Wraps up __atomic_thread_fence to support optimized code for __ATOMIC_SEQ_CST memory order. 2. Flag __atomic_thread_fence with __ATOMIC_SEQ_CST in new patches. 3. Fix email address typo in patch 2/4. v4: 1. add reader-writer concurrency case describing. 2. claim maintainership of c11 atomics code for each platforms. 3. flag rte_atomicNN_xxx in new patches for modules that have been converted to c11 style. 4. flag __sync_xxx builtins in new patches. 5. wraps up compiler atomic builtins 6. move the changes of libraries which make use of c11 atomic APIs out of this patchset. v3: add libatomic dependency for 32-bit clang v2: 1. fix Clang '-Wincompatible-pointer-types' WARNING. 2. fix typos. Phil Yang (3): doc: add optimizations using C11 atomic builtins eal/atomic: add wrapper for C11 atomic thread fence devtools: prevent use of rte atomic APIs in future patches devtools/checkpatches.sh | 35 ++++++++++++++ doc/guides/prog_guide/writing_efficient_code.rst | 59 +++++++++++++++++++++++- lib/librte_eal/arm/include/rte_atomic_32.h | 6 +++ lib/librte_eal/arm/include/rte_atomic_64.h | 6 +++ lib/librte_eal/include/generic/rte_atomic.h | 6 +++ lib/librte_eal/ppc/include/rte_atomic.h | 6 +++ lib/librte_eal/x86/include/rte_atomic.h | 17 +++++++ 7 files changed, 134 insertions(+), 1 deletion(-)