mbox series

[v1,0/3] relax io barrier for aarch64 and use smp barriers for virtual pci memory

Message ID 1571758074-16445-1-git-send-email-gavin.hu@arm.com (mailing list archive)
Headers
Series relax io barrier for aarch64 and use smp barriers for virtual pci memory |

Message

Gavin Hu Oct. 22, 2019, 3:27 p.m. UTC
  Armv8's peripheral coherence order is a total order on all reads and
writes to that peripheral, that makes a compiler barrier is enough for
abstracted rte io barrier.

For virtual PCI devices, the virtual device memory is actually normal
memory and the Hypervisor view of things takes precedence and they are
within a smp configuration and smp barriers should be used, the
relaxed io barrier for aarch64 becomes insufficient.

Gavin Hu (3):
  eal/arm64: relax the io barrier for aarch64
  net/virtio: virtual PCI requires smp barriers
  crypto/virtio: virtual PCI requires smp barriers

 drivers/crypto/virtio/virtio_pci.c                 | 124 ++++++++++++++++-----
 drivers/net/virtio/virtio_pci.c                    | 124 ++++++++++++++++-----
 .../common/include/arch/arm/rte_atomic_64.h        |   6 +-
 3 files changed, 191 insertions(+), 63 deletions(-)
  

Comments

Maxime Coquelin Oct. 23, 2019, 8:22 a.m. UTC | #1
Hi Gavin,

On 10/22/19 5:27 PM, Gavin Hu wrote:
> Armv8's peripheral coherence order is a total order on all reads and
> writes to that peripheral, that makes a compiler barrier is enough for
> abstracted rte io barrier.
> 
> For virtual PCI devices, the virtual device memory is actually normal
> memory and the Hypervisor view of things takes precedence and they are
> within a smp configuration and smp barriers should be used, the
> relaxed io barrier for aarch64 becomes insufficient.

IIUC, this series is for performance optimization and not fixing
coherency issues. Can you confirm?

If that's the case, I'm afraid we'll have to postpone it to v20.02,
our patch queues are already too big at that stage of the release.

Maxime

> Gavin Hu (3):
>   eal/arm64: relax the io barrier for aarch64
>   net/virtio: virtual PCI requires smp barriers
>   crypto/virtio: virtual PCI requires smp barriers
> 
>  drivers/crypto/virtio/virtio_pci.c                 | 124 ++++++++++++++++-----
>  drivers/net/virtio/virtio_pci.c                    | 124 ++++++++++++++++-----
>  .../common/include/arch/arm/rte_atomic_64.h        |   6 +-
>  3 files changed, 191 insertions(+), 63 deletions(-)
>
  
Gavin Hu Nov. 7, 2019, 1:13 a.m. UTC | #2
Hi Maxime,

> -----Original Message-----
> From: Maxime Coquelin <maxime.coquelin@redhat.com>
> Sent: Wednesday, October 23, 2019 4:23 PM
> To: Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com>; dev@dpdk.org
> Cc: nd <nd@arm.com>; david.marchand@redhat.com; tiwei.bie@intel.com;
> thomas@monjalon.net; rasland@mellanox.com; matan@mellanox.com;
> shahafs@mellanox.com; viacheslavo@mellanox.com;
> arybchenko@solarflare.com; stephen@networkplumber.org;
> hemant.agrawal@nxp.com; jerinj@marvell.com;
> pbhagavatula@marvell.com; Honnappa Nagarahalli
> <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang (Arm Technology China)
> <Ruifeng.Wang@arm.com>; Phil Yang (Arm Technology China)
> <Phil.Yang@arm.com>; Joyce Kong (Arm Technology China)
> <Joyce.Kong@arm.com>; Steve Capper <Steve.Capper@arm.com>
> Subject: Re: [PATCH v1 0/3] relax io barrier for aarch64 and use smp barriers
> for virtual pci memory
> 
> Hi Gavin,
> 
> On 10/22/19 5:27 PM, Gavin Hu wrote:
> > Armv8's peripheral coherence order is a total order on all reads and
> > writes to that peripheral, that makes a compiler barrier is enough for
> > abstracted rte io barrier.
> >
> > For virtual PCI devices, the virtual device memory is actually normal
> > memory and the Hypervisor view of things takes precedence and they are
> > within a smp configuration and smp barriers should be used, the
> > relaxed io barrier for aarch64 becomes insufficient.
> 
> IIUC, this series is for performance optimization and not fixing
> coherency issues. Can you confirm?
Yes, this is for perf optimization.
> 
> If that's the case, I'm afraid we'll have to postpone it to v20.02,
> our patch queues are already too big at that stage of the release.
Ok, no problem, thanks!
> 
> Maxime
> 
> > Gavin Hu (3):
> >   eal/arm64: relax the io barrier for aarch64
> >   net/virtio: virtual PCI requires smp barriers
> >   crypto/virtio: virtual PCI requires smp barriers
> >
> >  drivers/crypto/virtio/virtio_pci.c                 | 124 ++++++++++++++++-----
> >  drivers/net/virtio/virtio_pci.c                    | 124 ++++++++++++++++-----
> >  .../common/include/arch/arm/rte_atomic_64.h        |   6 +-
> >  3 files changed, 191 insertions(+), 63 deletions(-)
> >