Message ID | 1571758074-16445-1-git-send-email-gavin.hu@arm.com (mailing list archive) |
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Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@dpdk.org Delivered-To: patchwork@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EB4581BEA8; Tue, 22 Oct 2019 17:28:20 +0200 (CEST) Received: from foss.arm.com (unknown [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 26A541BEA4 for <dev@dpdk.org>; Tue, 22 Oct 2019 17:28:19 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 948E51762; Tue, 22 Oct 2019 08:28:09 -0700 (PDT) Received: from net-arm-thunderx2-01.test.ast.arm.com (net-arm-thunderx2-01.shanghai.arm.com [10.169.40.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 649D73F71A; Tue, 22 Oct 2019 08:28:03 -0700 (PDT) From: Gavin Hu <gavin.hu@arm.com> To: dev@dpdk.org Cc: nd@arm.com, david.marchand@redhat.com, maxime.coquelin@redhat.com, tiwei.bie@intel.com, thomas@monjalon.net, rasland@mellanox.com, matan@mellanox.com, shahafs@mellanox.com, viacheslavo@mellanox.com, arybchenko@solarflare.com, stephen@networkplumber.org, hemant.agrawal@nxp.com, jerinj@marvell.com, pbhagavatula@marvell.com, Honnappa.Nagarahalli@arm.com, ruifeng.wang@arm.com, phil.yang@arm.com, joyce.kong@arm.com, steve.capper@arm.com Date: Tue, 22 Oct 2019 23:27:51 +0800 Message-Id: <1571758074-16445-1-git-send-email-gavin.hu@arm.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v1 0/3] relax io barrier for aarch64 and use smp barriers for virtual pci memory X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Series |
relax io barrier for aarch64 and use smp barriers for virtual pci memory
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Message
Gavin Hu
Oct. 22, 2019, 3:27 p.m. UTC
Armv8's peripheral coherence order is a total order on all reads and writes to that peripheral, that makes a compiler barrier is enough for abstracted rte io barrier. For virtual PCI devices, the virtual device memory is actually normal memory and the Hypervisor view of things takes precedence and they are within a smp configuration and smp barriers should be used, the relaxed io barrier for aarch64 becomes insufficient. Gavin Hu (3): eal/arm64: relax the io barrier for aarch64 net/virtio: virtual PCI requires smp barriers crypto/virtio: virtual PCI requires smp barriers drivers/crypto/virtio/virtio_pci.c | 124 ++++++++++++++++----- drivers/net/virtio/virtio_pci.c | 124 ++++++++++++++++----- .../common/include/arch/arm/rte_atomic_64.h | 6 +- 3 files changed, 191 insertions(+), 63 deletions(-)
Comments
Hi Gavin, On 10/22/19 5:27 PM, Gavin Hu wrote: > Armv8's peripheral coherence order is a total order on all reads and > writes to that peripheral, that makes a compiler barrier is enough for > abstracted rte io barrier. > > For virtual PCI devices, the virtual device memory is actually normal > memory and the Hypervisor view of things takes precedence and they are > within a smp configuration and smp barriers should be used, the > relaxed io barrier for aarch64 becomes insufficient. IIUC, this series is for performance optimization and not fixing coherency issues. Can you confirm? If that's the case, I'm afraid we'll have to postpone it to v20.02, our patch queues are already too big at that stage of the release. Maxime > Gavin Hu (3): > eal/arm64: relax the io barrier for aarch64 > net/virtio: virtual PCI requires smp barriers > crypto/virtio: virtual PCI requires smp barriers > > drivers/crypto/virtio/virtio_pci.c | 124 ++++++++++++++++----- > drivers/net/virtio/virtio_pci.c | 124 ++++++++++++++++----- > .../common/include/arch/arm/rte_atomic_64.h | 6 +- > 3 files changed, 191 insertions(+), 63 deletions(-) >
Hi Maxime, > -----Original Message----- > From: Maxime Coquelin <maxime.coquelin@redhat.com> > Sent: Wednesday, October 23, 2019 4:23 PM > To: Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com>; dev@dpdk.org > Cc: nd <nd@arm.com>; david.marchand@redhat.com; tiwei.bie@intel.com; > thomas@monjalon.net; rasland@mellanox.com; matan@mellanox.com; > shahafs@mellanox.com; viacheslavo@mellanox.com; > arybchenko@solarflare.com; stephen@networkplumber.org; > hemant.agrawal@nxp.com; jerinj@marvell.com; > pbhagavatula@marvell.com; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com>; Ruifeng Wang (Arm Technology China) > <Ruifeng.Wang@arm.com>; Phil Yang (Arm Technology China) > <Phil.Yang@arm.com>; Joyce Kong (Arm Technology China) > <Joyce.Kong@arm.com>; Steve Capper <Steve.Capper@arm.com> > Subject: Re: [PATCH v1 0/3] relax io barrier for aarch64 and use smp barriers > for virtual pci memory > > Hi Gavin, > > On 10/22/19 5:27 PM, Gavin Hu wrote: > > Armv8's peripheral coherence order is a total order on all reads and > > writes to that peripheral, that makes a compiler barrier is enough for > > abstracted rte io barrier. > > > > For virtual PCI devices, the virtual device memory is actually normal > > memory and the Hypervisor view of things takes precedence and they are > > within a smp configuration and smp barriers should be used, the > > relaxed io barrier for aarch64 becomes insufficient. > > IIUC, this series is for performance optimization and not fixing > coherency issues. Can you confirm? Yes, this is for perf optimization. > > If that's the case, I'm afraid we'll have to postpone it to v20.02, > our patch queues are already too big at that stage of the release. Ok, no problem, thanks! > > Maxime > > > Gavin Hu (3): > > eal/arm64: relax the io barrier for aarch64 > > net/virtio: virtual PCI requires smp barriers > > crypto/virtio: virtual PCI requires smp barriers > > > > drivers/crypto/virtio/virtio_pci.c | 124 ++++++++++++++++----- > > drivers/net/virtio/virtio_pci.c | 124 ++++++++++++++++----- > > .../common/include/arch/arm/rte_atomic_64.h | 6 +- > > 3 files changed, 191 insertions(+), 63 deletions(-) > >