cryptodev: fix restore crypto op alignment and layout

  in 18.08 new cache-aligned structure rte_crypto_asym_op was introduced.
As it also was included into rte_crypto_op, it caused implicit change
in rte_crypto_op layout and alignment: now rte_crypto_op is cahce-line
aligned has a hole of 40/104 bytes between phys_addr and sym/asym op.
It looks like unintended ABI breakage, plus such change can cause
negative performance effects:
- now status and sym[0].m_src lies on different cache-lines, so
  post-process code would need extra cache-line read.
- new alignment causes grow of the space requirements and cache-line
  reads/updates for structures that contain rte_crypto_op inside.
As there seems no actual need to have rte_crypto_asym_op cache-line
aligned, and rte_crypto_asym_op is not intended to be used on it's own -
the simplest fix is just to remove cache-line alignment for it.
As the immediate positive effect: on IA ipsec-secgw performance increased
by 5-10% (depending on the crypto-dev and algo used).
My guess that on machines with 128B cache-line and lookaside-protocol
capable crypto devices the impact will be even more noticeable.

Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
---
 doc/guides/rel_notes/release_19_05.rst | 7 +++++++
 lib/librte_cryptodev/Makefile          | 2 +-
 lib/librte_cryptodev/meson.build       | 2 +-
 lib/librte_cryptodev/rte_crypto_asym.h | 2 +-
 4 files changed, 10 insertions(+), 3 deletions(-)
  

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Konstantin Ananyev
> Sent: Thursday, March 7, 2019 2:13 PM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; umesh.kartha@caviumnetworks.com; De Lara Guarch, Pablo
> <pablo.de.lara.guarch@intel.com>; shally.verma@caviumnetworks.com; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>
> Subject: [dpdk-dev] [PATCH] cryptodev: fix restore crypto op alignment and layout
> 
> in 18.08 new cache-aligned structure rte_crypto_asym_op was introduced.
> As it also was included into rte_crypto_op, it caused implicit change
> in rte_crypto_op layout and alignment: now rte_crypto_op is cahce-line
> aligned has a hole of 40/104 bytes between phys_addr and sym/asym op.
> It looks like unintended ABI breakage, plus such change can cause
> negative performance effects:
> - now status and sym[0].m_src lies on different cache-lines, so
>   post-process code would need extra cache-line read.
> - new alignment causes grow of the space requirements and cache-line
>   reads/updates for structures that contain rte_crypto_op inside.
> As there seems no actual need to have rte_crypto_asym_op cache-line
> aligned, and rte_crypto_asym_op is not intended to be used on it's own -
> the simplest fix is just to remove cache-line alignment for it.
> As the immediate positive effect: on IA ipsec-secgw performance increased
> by 5-10% (depending on the crypto-dev and algo used).
> My guess that on machines with 128B cache-line and lookaside-protocol
> capable crypto devices the impact will be even more noticeable.
> 
> Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
> 
> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
  

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Konstantin Ananyev
> Sent: Thursday, March 7, 2019 7:43 PM
> To: dev@dpdk.org
> Cc: akhil.goyal@nxp.com; umesh.kartha@caviumnetworks.com;
> pablo.de.lara.guarch@intel.com; shally.verma@caviumnetworks.com;
> Konstantin Ananyev <konstantin.ananyev@intel.com>
> Subject: [dpdk-dev] [PATCH] cryptodev: fix restore crypto op alignment and
> layout
> 
> in 18.08 new cache-aligned structure rte_crypto_asym_op was introduced.
> As it also was included into rte_crypto_op, it caused implicit change in
> rte_crypto_op layout and alignment: now rte_crypto_op is cahce-line aligned
> has a hole of 40/104 bytes between phys_addr and sym/asym op.
> It looks like unintended ABI breakage, plus such change can cause negative
> performance effects:
> - now status and sym[0].m_src lies on different cache-lines, so
>   post-process code would need extra cache-line read.
> - new alignment causes grow of the space requirements and cache-line
>   reads/updates for structures that contain rte_crypto_op inside.
> As there seems no actual need to have rte_crypto_asym_op cache-line
> aligned, and rte_crypto_asym_op is not intended to be used on it's own - the
> simplest fix is just to remove cache-line alignment for it.
> As the immediate positive effect: on IA ipsec-secgw performance increased
> by 5-10% (depending on the crypto-dev and algo used).
> My guess that on machines with 128B cache-line and lookaside-protocol
> capable crypto devices the impact will be even more noticeable.
> 
> Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
> 
> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
It's a valid point that asym_op is not going to be used standalone. Thanks for pointing it out. 
Acked-by: Shally Verma <shally.verma@marvell.com>
  

Hi Konstantin,

On 3/7/2019 7:43 PM, Konstantin Ananyev wrote:
> in 18.08 new cache-aligned structure rte_crypto_asym_op was introduced.
> As it also was included into rte_crypto_op, it caused implicit change
> in rte_crypto_op layout and alignment: now rte_crypto_op is cahce-line
> aligned has a hole of 40/104 bytes between phys_addr and sym/asym op.
> It looks like unintended ABI breakage, plus such change can cause
> negative performance effects:
> - now status and sym[0].m_src lies on different cache-lines, so
>    post-process code would need extra cache-line read.
> - new alignment causes grow of the space requirements and cache-line
>    reads/updates for structures that contain rte_crypto_op inside.
> As there seems no actual need to have rte_crypto_asym_op cache-line
> aligned, and rte_crypto_asym_op is not intended to be used on it's own -
> the simplest fix is just to remove cache-line alignment for it.
> As the immediate positive effect: on IA ipsec-secgw performance increased
> by 5-10% (depending on the crypto-dev and algo used).
> My guess that on machines with 128B cache-line and lookaside-protocol
> capable crypto devices the impact will be even more noticeable.
>
> Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
>
> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
> ---
>   doc/guides/rel_notes/release_19_05.rst | 7 +++++++
>   lib/librte_cryptodev/Makefile          | 2 +-
>   lib/librte_cryptodev/meson.build       | 2 +-
>   lib/librte_cryptodev/rte_crypto_asym.h | 2 +-
>   4 files changed, 10 insertions(+), 3 deletions(-)
>
> diff --git a/doc/guides/rel_notes/release_19_05.rst b/doc/guides/rel_notes/release_19_05.rst
> index c0390ca16..ec2651b65 100644
> --- a/doc/guides/rel_notes/release_19_05.rst
> +++ b/doc/guides/rel_notes/release_19_05.rst
> @@ -116,6 +116,13 @@ ABI Changes
>      Also, make sure to start the actual text at the margin.
>      =========================================================
>   
> +* cryptodev: in 18.08 new structure ``rte_crypto_asym_op`` was introduced and
> +  included into ``rte_crypto_op``. As ``rte_crypto_asym_op`` structure was
> +  defined as cache-line aligned that caused unintended changes in
> +  ``rte_crypto_op`` structure layout and alignment. Remove cache-line
> +  alignment for ``rte_crypto_asym_op`` to restore expected ``rte_crypto_op``
> +  layout and alignment.
> +
>   
ABI version should be bumped in the release notes as well. I will update 
that while merging.
Apart from that
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
>   Shared Library Versions
>   -----------------------
>
  

On 3/19/2019 7:03 PM, Akhil Goyal wrote:
> Hi Konstantin,
>
> On 3/7/2019 7:43 PM, Konstantin Ananyev wrote:
>> in 18.08 new cache-aligned structure rte_crypto_asym_op was introduced.
>> As it also was included into rte_crypto_op, it caused implicit change
>> in rte_crypto_op layout and alignment: now rte_crypto_op is cahce-line
>> aligned has a hole of 40/104 bytes between phys_addr and sym/asym op.
>> It looks like unintended ABI breakage, plus such change can cause
>> negative performance effects:
>> - now status and sym[0].m_src lies on different cache-lines, so
>>     post-process code would need extra cache-line read.
>> - new alignment causes grow of the space requirements and cache-line
>>     reads/updates for structures that contain rte_crypto_op inside.
>> As there seems no actual need to have rte_crypto_asym_op cache-line
>> aligned, and rte_crypto_asym_op is not intended to be used on it's own -
>> the simplest fix is just to remove cache-line alignment for it.
>> As the immediate positive effect: on IA ipsec-secgw performance increased
>> by 5-10% (depending on the crypto-dev and algo used).
>> My guess that on machines with 128B cache-line and lookaside-protocol
>> capable crypto devices the impact will be even more noticeable.
>>
>> Fixes: 26008aaed14c ("cryptodev: add asymmetric xform and op definitions")
>>
>> Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
>> ---
>>    doc/guides/rel_notes/release_19_05.rst | 7 +++++++
>>    lib/librte_cryptodev/Makefile          | 2 +-
>>    lib/librte_cryptodev/meson.build       | 2 +-
>>    lib/librte_cryptodev/rte_crypto_asym.h | 2 +-
>>    4 files changed, 10 insertions(+), 3 deletions(-)
>>
>> diff --git a/doc/guides/rel_notes/release_19_05.rst b/doc/guides/rel_notes/release_19_05.rst
>> index c0390ca16..ec2651b65 100644
>> --- a/doc/guides/rel_notes/release_19_05.rst
>> +++ b/doc/guides/rel_notes/release_19_05.rst
>> @@ -116,6 +116,13 @@ ABI Changes
>>       Also, make sure to start the actual text at the margin.
>>       =========================================================
>>    
>> +* cryptodev: in 18.08 new structure ``rte_crypto_asym_op`` was introduced and
>> +  included into ``rte_crypto_op``. As ``rte_crypto_asym_op`` structure was
>> +  defined as cache-line aligned that caused unintended changes in
>> +  ``rte_crypto_op`` structure layout and alignment. Remove cache-line
>> +  alignment for ``rte_crypto_asym_op`` to restore expected ``rte_crypto_op``
>> +  layout and alignment.
>> +
>>    
> ABI version should be bumped in the release notes as well. I will update
> that while merging.
> Apart from that
> Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
>>    Shared Library Versions
>>    -----------------------
>>
Applied to dpdk-next-crypto

Thanks.