[1/4] net/cxgbe: use relative paths for including header files
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Commit Message
Explicitly state header file location using relative paths.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
---
drivers/net/cxgbe/Makefile | 2 --
drivers/net/cxgbe/base/adapter.h | 4 ++--
drivers/net/cxgbe/base/common.h | 2 +-
drivers/net/cxgbe/clip_tbl.c | 2 +-
drivers/net/cxgbe/cxgbe.h | 4 ++--
drivers/net/cxgbe/cxgbe_ethdev.c | 2 +-
drivers/net/cxgbe/cxgbe_filter.c | 7 ++++---
drivers/net/cxgbe/cxgbe_filter.h | 2 +-
drivers/net/cxgbe/cxgbe_flow.c | 2 +-
drivers/net/cxgbe/cxgbe_main.c | 6 +++---
drivers/net/cxgbe/cxgbevf_ethdev.c | 2 +-
drivers/net/cxgbe/cxgbevf_main.c | 6 +++---
drivers/net/cxgbe/l2t.c | 3 ++-
drivers/net/cxgbe/l2t.h | 2 +-
drivers/net/cxgbe/mps_tcam.h | 2 +-
drivers/net/cxgbe/sge.c | 6 +++---
16 files changed, 27 insertions(+), 27 deletions(-)
Comments
On 12/13/2018 3:02 PM, Rahul Lakkireddy wrote:
> Explicitly state header file location using relative paths.
>
> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
> ---
> drivers/net/cxgbe/Makefile | 2 --
> drivers/net/cxgbe/base/adapter.h | 4 ++--
> drivers/net/cxgbe/base/common.h | 2 +-
> drivers/net/cxgbe/clip_tbl.c | 2 +-
> drivers/net/cxgbe/cxgbe.h | 4 ++--
> drivers/net/cxgbe/cxgbe_ethdev.c | 2 +-
> drivers/net/cxgbe/cxgbe_filter.c | 7 ++++---
> drivers/net/cxgbe/cxgbe_filter.h | 2 +-
> drivers/net/cxgbe/cxgbe_flow.c | 2 +-
> drivers/net/cxgbe/cxgbe_main.c | 6 +++---
> drivers/net/cxgbe/cxgbevf_ethdev.c | 2 +-
> drivers/net/cxgbe/cxgbevf_main.c | 6 +++---
> drivers/net/cxgbe/l2t.c | 3 ++-
> drivers/net/cxgbe/l2t.h | 2 +-
> drivers/net/cxgbe/mps_tcam.h | 2 +-
> drivers/net/cxgbe/sge.c | 6 +++---
> 16 files changed, 27 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/net/cxgbe/Makefile b/drivers/net/cxgbe/Makefile
> index 68466f13e..d809f4720 100644
> --- a/drivers/net/cxgbe/Makefile
> +++ b/drivers/net/cxgbe/Makefile
> @@ -9,8 +9,6 @@ include $(RTE_SDK)/mk/rte.vars.mk
> #
> LIB = librte_pmd_cxgbe.a
>
> -CFLAGS += -I$(SRCDIR)/base/
> -CFLAGS += -I$(SRCDIR)
> CFLAGS += -O3
> CFLAGS += $(WERROR_FLAGS)
Hi Rahul,
What issue do you observe if you don't use relative paths?
On Tuesday, December 12/18/18, 2018 at 23:53:38 +0530, Ferruh Yigit wrote:
> On 12/13/2018 3:02 PM, Rahul Lakkireddy wrote:
> > Explicitly state header file location using relative paths.
> >
> > Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
> > ---
> > drivers/net/cxgbe/Makefile | 2 --
> > drivers/net/cxgbe/base/adapter.h | 4 ++--
> > drivers/net/cxgbe/base/common.h | 2 +-
> > drivers/net/cxgbe/clip_tbl.c | 2 +-
> > drivers/net/cxgbe/cxgbe.h | 4 ++--
> > drivers/net/cxgbe/cxgbe_ethdev.c | 2 +-
> > drivers/net/cxgbe/cxgbe_filter.c | 7 ++++---
> > drivers/net/cxgbe/cxgbe_filter.h | 2 +-
> > drivers/net/cxgbe/cxgbe_flow.c | 2 +-
> > drivers/net/cxgbe/cxgbe_main.c | 6 +++---
> > drivers/net/cxgbe/cxgbevf_ethdev.c | 2 +-
> > drivers/net/cxgbe/cxgbevf_main.c | 6 +++---
> > drivers/net/cxgbe/l2t.c | 3 ++-
> > drivers/net/cxgbe/l2t.h | 2 +-
> > drivers/net/cxgbe/mps_tcam.h | 2 +-
> > drivers/net/cxgbe/sge.c | 6 +++---
> > 16 files changed, 27 insertions(+), 27 deletions(-)
> >
> > diff --git a/drivers/net/cxgbe/Makefile b/drivers/net/cxgbe/Makefile
> > index 68466f13e..d809f4720 100644
> > --- a/drivers/net/cxgbe/Makefile
> > +++ b/drivers/net/cxgbe/Makefile
> > @@ -9,8 +9,6 @@ include $(RTE_SDK)/mk/rte.vars.mk
> > #
> > LIB = librte_pmd_cxgbe.a
> >
> > -CFLAGS += -I$(SRCDIR)/base/
> > -CFLAGS += -I$(SRCDIR)
> > CFLAGS += -O3
> > CFLAGS += $(WERROR_FLAGS)
>
> Hi Rahul,
>
> What issue do you observe if you don't use relative paths?
The Intel C++ compiler [1] is not able to locate the header files without
relative path in Windows. We get the following error for these header
files.
# base\common.h(9): error : cannot open source file "cxgbe_compat.h"
#include "cxgbe_compat.h"
^
We could reproduce the same error by removing the above two lines for
Linux. To keep it consistent across both OS, I'm using relative paths
for both.
[1] https://software.intel.com/en-us/parallel-studio-xe
Thanks,
Rahul
@@ -9,8 +9,6 @@ include $(RTE_SDK)/mk/rte.vars.mk
#
LIB = librte_pmd_cxgbe.a
-CFLAGS += -I$(SRCDIR)/base/
-CFLAGS += -I$(SRCDIR)
CFLAGS += -O3
CFLAGS += $(WERROR_FLAGS)
@@ -14,9 +14,9 @@
#include <rte_rwlock.h>
#include <rte_ethdev.h>
-#include "cxgbe_compat.h"
+#include "../cxgbe_compat.h"
+#include "../cxgbe_ofld.h"
#include "t4_regs_values.h"
-#include "cxgbe_ofld.h"
enum {
MAX_ETH_QSETS = 64, /* # of Ethernet Tx/Rx queue sets */
@@ -6,7 +6,7 @@
#ifndef __CHELSIO_COMMON_H
#define __CHELSIO_COMMON_H
-#include "cxgbe_compat.h"
+#include "../cxgbe_compat.h"
#include "t4_hw.h"
#include "t4vf_hw.h"
#include "t4_chip_type.h"
@@ -3,7 +3,7 @@
* All rights reserved.
*/
-#include "common.h"
+#include "base/common.h"
#include "clip_tbl.h"
/**
@@ -6,8 +6,8 @@
#ifndef _CXGBE_H_
#define _CXGBE_H_
-#include "common.h"
-#include "t4_regs.h"
+#include "base/common.h"
+#include "base/t4_regs.h"
#define CXGBE_MIN_RING_DESC_SIZE 128 /* Min TX/RX descriptor ring size */
#define CXGBE_MAX_RING_DESC_SIZE 4096 /* Max TX/RX descriptor ring size */
@@ -57,7 +57,7 @@
/*
*... and the PCI ID Table itself ...
*/
-#include "t4_pci_id_tbl.h"
+#include "base/t4_pci_id_tbl.h"
uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
@@ -3,9 +3,10 @@
* All rights reserved.
*/
#include <rte_net.h>
-#include "common.h"
-#include "t4_tcb.h"
-#include "t4_regs.h"
+
+#include "base/common.h"
+#include "base/t4_tcb.h"
+#include "base/t4_regs.h"
#include "cxgbe_filter.h"
#include "clip_tbl.h"
#include "l2t.h"
@@ -6,7 +6,7 @@
#ifndef _CXGBE_FILTER_H_
#define _CXGBE_FILTER_H_
-#include "t4_msg.h"
+#include "base/t4_msg.h"
/*
* Defined bit width of user definable filter tuples
*/
@@ -2,7 +2,7 @@
* Copyright(c) 2018 Chelsio Communications.
* All rights reserved.
*/
-#include "common.h"
+#include "base/common.h"
#include "cxgbe_flow.h"
#define __CXGBE_FILL_FS(__v, __m, fs, elem, e) \
@@ -33,9 +33,9 @@
#include <rte_dev.h>
#include <rte_kvargs.h>
-#include "common.h"
-#include "t4_regs.h"
-#include "t4_msg.h"
+#include "base/common.h"
+#include "base/t4_regs.h"
+#include "base/t4_msg.h"
#include "cxgbe.h"
#include "clip_tbl.h"
#include "l2t.h"
@@ -28,7 +28,7 @@
/*
*... and the PCI ID Table itself ...
*/
-#include "t4_pci_id_tbl.h"
+#include "base/t4_pci_id_tbl.h"
/*
* Get port statistics.
@@ -7,9 +7,9 @@
#include <rte_ethdev_pci.h>
#include <rte_malloc.h>
-#include "common.h"
-#include "t4_regs.h"
-#include "t4_msg.h"
+#include "base/common.h"
+#include "base/t4_regs.h"
+#include "base/t4_msg.h"
#include "cxgbe.h"
#include "mps_tcam.h"
@@ -2,7 +2,8 @@
* Copyright(c) 2018 Chelsio Communications.
* All rights reserved.
*/
-#include "common.h"
+
+#include "base/common.h"
#include "l2t.h"
/**
@@ -5,7 +5,7 @@
#ifndef _CXGBE_L2T_H_
#define _CXGBE_L2T_H_
-#include "t4_msg.h"
+#include "base/t4_msg.h"
enum {
L2T_SIZE = 4096 /* # of L2T entries */
@@ -6,7 +6,7 @@
#ifndef _CXGBE_MPSTCAM_H_
#define _CXGBE_MPSTCAM_H_
-#include "common.h"
+#include "base/common.h"
enum {
MPS_ENTRY_UNUSED, /* Keep this first so memset 0 renders
@@ -33,9 +33,9 @@
#include <rte_random.h>
#include <rte_dev.h>
-#include "common.h"
-#include "t4_regs.h"
-#include "t4_msg.h"
+#include "base/common.h"
+#include "base/t4_regs.h"
+#include "base/t4_msg.h"
#include "cxgbe.h"
static inline void ship_tx_pkt_coalesce_wr(struct adapter *adap,