diff mbox

[dpdk-dev,v2] net/e1000: fix cannot getting Rx interrupts issue

Message ID 1509936100-25343-1-git-send-email-xiaoyun.li@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK

Commit Message

Li, Xiaoyun Nov. 6, 2017, 2:41 a.m. UTC 
  When using VFIO and MSIX interrupt mode, cannot get Rx interrupts. Because
when enabling the interrupt vectors, the offset is computed in a way which
only supports IGB_UIO. But the offset should be different when using VFIO.
This patch fixes this issue.

Fixes: c3cd3de0ab50 ("igb: enable Rx queue interrupts for PF")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
---
v2:
* Modify the commit log to be more clear.

 drivers/net/e1000/igb_ethdev.c | 16 ++++++++++++++--
 1 file changed, 14 insertions(+), 2 deletions(-)

Comments

Wenzhuo Lu Nov. 6, 2017, 4:57 a.m. UTC | #1 
Hi,

> -----Original Message-----
> From: Li, Xiaoyun
> Sent: Monday, November 6, 2017 10:42 AM
> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>
> Cc: dev@dpdk.org; Li, Xiaoyun <xiaoyun.li@intel.com>; stable@dpdk.org
> Subject: [PATCH v2] net/e1000: fix cannot getting Rx interrupts issue
> 
> When using VFIO and MSIX interrupt mode, cannot get Rx interrupts.
> Because when enabling the interrupt vectors, the offset is computed in a
> way which only supports IGB_UIO. But the offset should be different when
> using VFIO.
> This patch fixes this issue.
> 
> Fixes: c3cd3de0ab50 ("igb: enable Rx queue interrupts for PF")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Ferruh Yigit Nov. 7, 2017, 4:48 a.m. UTC | #2 
On 11/5/2017 8:57 PM, Lu, Wenzhuo wrote:
> Hi,
> 
>> -----Original Message-----
>> From: Li, Xiaoyun
>> Sent: Monday, November 6, 2017 10:42 AM
>> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>
>> Cc: dev@dpdk.org; Li, Xiaoyun <xiaoyun.li@intel.com>; stable@dpdk.org
>> Subject: [PATCH v2] net/e1000: fix cannot getting Rx interrupts issue
>>
>> When using VFIO and MSIX interrupt mode, cannot get Rx interrupts.
>> Because when enabling the interrupt vectors, the offset is computed in a
>> way which only supports IGB_UIO. But the offset should be different when
>> using VFIO.
>> This patch fixes this issue.
>>
>> Fixes: c3cd3de0ab50 ("igb: enable Rx queue interrupts for PF")
>> Cc: stable@dpdk.org
>>
>> Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>

Applied to dpdk-next-net/master, thanks.
diff mbox

Patch

diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 003bdf0..dc70d22 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -5387,7 +5387,14 @@  eth_igb_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
 {
 	struct e1000_hw *hw =
 		E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-	uint32_t mask = 1 << queue_id;
+	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+	uint32_t vec = E1000_MISC_VEC_ID;
+
+	if (rte_intr_allow_others(intr_handle))
+		vec = E1000_RX_VEC_START;
+
+	uint32_t mask = 1 << (queue_id + vec);
 
 	E1000_WRITE_REG(hw, E1000_EIMC, mask);
 	E1000_WRITE_FLUSH(hw);
@@ -5402,7 +5409,12 @@  eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 		E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 	struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 	struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
-	uint32_t mask = 1 << queue_id;
+	uint32_t vec = E1000_MISC_VEC_ID;
+
+	if (rte_intr_allow_others(intr_handle))
+		vec = E1000_RX_VEC_START;
+
+	uint32_t mask = 1 << (queue_id + vec);
 	uint32_t regval;
 
 	regval = E1000_READ_REG(hw, E1000_EIMS);