| Message ID | 1624599410-29689-1-git-send-email-anoobj@marvell.com (mailing list archive) |
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Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD710A0C40; Fri, 25 Jun 2021 07:37:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 21B2640698; Fri, 25 Jun 2021 07:37:10 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 6ACCD4068A for <dev@dpdk.org>; Fri, 25 Jun 2021 07:37:08 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 15P5aJG3016893; Thu, 24 Jun 2021 22:37:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=v5SmgLuzas86pf4hlHQ29osolvKkzlUOzjSHlCEat/s=; b=YwtXSJ5ERWaxVtnCAnsX1/wqItzo7YBSTAwU1HceoHynwCTJLRVoyu3u0UTM0Fsjz+VT S8hcbMRlw2MwOmjaPqTKeeRhdydB4awVBQXfgAZmMdUXg9auVJKv8H7BVQMCFfBPkeQh 0uzzhpFjW/rbGuo6q/S8fZhAkiCk9119OFPVzUf+19HOCfpwoMgXvgeK7vU1ni8oLxyo s/y3/PdYWai0UNJIhA1KgtrUd3Q8b5fLl1ZPx26VjPvBSpJfjfKtvd+v4SrsxNupVk9s /30TUbNRnwMSpdiED+bJOSPg2K6RivzoNQt/wVevKqvA+AimSWuteCmYdNxglUANe5hT 5g== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 39d241sg2j-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 24 Jun 2021 22:37:07 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 24 Jun 2021 22:37:05 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Thu, 24 Jun 2021 22:37:05 -0700 Received: from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218]) by maili.marvell.com (Postfix) with ESMTP id F32E13F705C; Thu, 24 Jun 2021 22:37:02 -0700 (PDT) From: Anoob Joseph <anoobj@marvell.com> To: Akhil Goyal <gakhil@marvell.com>, Thomas Monjalon <thomas@monjalon.net> CC: Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>, "Ankur Dwivedi" <adwivedi@marvell.com>, Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org> Date: Fri, 25 Jun 2021 11:06:32 +0530 Message-ID: <1624599410-29689-1-git-send-email-anoobj@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/> References: <patches.dpdk.org/project/dpdk/patch/1622649385-22652-1-git-send-email-anoobj@marvell.com/> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-GUID: uVzJpSqCs3ftIVmnbcpEd_S1h8ESYhtG X-Proofpoint-ORIG-GUID: uVzJpSqCs3ftIVmnbcpEd_S1h8ESYhtG X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-06-25_01:2021-06-24, 2021-06-25 signatures=0 Subject: [dpdk-dev] [PATCH v2 00/17] Add CPT in Marvell CNXK common driver X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
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Add CPT in Marvell CNXK common driver
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Message
Anoob Joseph
June 25, 2021, 5:36 a.m. UTC
This patchset adds initial support for CPT in common code for Marvell CN10K SoC. CPT is the hardware cryptographic block available in 'cnxk' family SoC. CPT, with its microcoded engines can support symmetric, asymmetric and IPsec operations. CPT can associate with NIX (rte_ethdev) to enable inline IPsec functionality. Similarly, CPT can associate with SSO (rte_eventdev) to enable crypto adapter. Based on CNXK common driver, new crypto PMDs would be added under 'crypto/cnxk'. Changes in v2 - Moved FPM & EC tables to RoC - Moved set_key routines to RoC - Added inline IPsec required mboxes and framework - Added security common code - Added plt_dp_* log based on Akhil's comment Aakash Sasidharan (2): common/cnxk: add CPT diagnostics common/cnxk: add CPT LF flush Ankur Dwivedi (1): common/cnxk: add SE set key functions in roc Anoob Joseph (3): common/cnxk: add CPT dev config routines common/cnxk: add idev CPT set - get common/cnxk: add lmtline init Archana Muniganti (1): common/cnxk: add CPT LF config Kiran Kumar Kokkilagadda (4): common/cnxk: add SE microcode defines common/cnxk: add AE microcode defines common/cnxk: add fpm tables common/cnxk: add EC grp static vectors Srujana Challa (3): common/cnxk: update Rx inline IPsec mbox message format common/cnxk: add IE microcode defines common/cnxk: add IPsec common code Vidya Sagar Velumuri (3): common/cnxk: add CPT HW defines common/cnxk: add mbox to configure RXC common/cnxk: add inline IPsec configuration mbox drivers/common/cnxk/cnxk_security.c | 468 +++++++++++++ drivers/common/cnxk/cnxk_security.h | 49 ++ drivers/common/cnxk/hw/cpt.h | 291 ++++++++ drivers/common/cnxk/meson.build | 11 +- drivers/common/cnxk/roc_ae.c | 142 ++++ drivers/common/cnxk/roc_ae.h | 63 ++ drivers/common/cnxk/roc_ae_fpm_tables.c | 1140 +++++++++++++++++++++++++++++++ drivers/common/cnxk/roc_ae_fpm_tables.h | 13 + drivers/common/cnxk/roc_api.h | 16 + drivers/common/cnxk/roc_cpt.c | 828 ++++++++++++++++++++++ drivers/common/cnxk/roc_cpt.h | 145 ++++ drivers/common/cnxk/roc_cpt_debug.c | 167 +++++ drivers/common/cnxk/roc_cpt_priv.h | 41 ++ drivers/common/cnxk/roc_dev.c | 2 + drivers/common/cnxk/roc_dev_priv.h | 1 + drivers/common/cnxk/roc_idev.c | 21 + drivers/common/cnxk/roc_idev.h | 3 + drivers/common/cnxk/roc_idev_priv.h | 2 + drivers/common/cnxk/roc_ie.h | 19 + drivers/common/cnxk/roc_ie_on.h | 152 +++++ drivers/common/cnxk/roc_ie_ot.h | 534 +++++++++++++++ drivers/common/cnxk/roc_mbox.h | 3 + drivers/common/cnxk/roc_platform.c | 1 + drivers/common/cnxk/roc_platform.h | 9 + drivers/common/cnxk/roc_priv.h | 3 + drivers/common/cnxk/roc_se.c | 342 ++++++++++ drivers/common/cnxk/roc_se.h | 275 ++++++++ drivers/common/cnxk/version.map | 32 + 28 files changed, 4772 insertions(+), 1 deletion(-) create mode 100644 drivers/common/cnxk/cnxk_security.c create mode 100644 drivers/common/cnxk/cnxk_security.h create mode 100644 drivers/common/cnxk/hw/cpt.h create mode 100644 drivers/common/cnxk/roc_ae.c create mode 100644 drivers/common/cnxk/roc_ae.h create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.c create mode 100644 drivers/common/cnxk/roc_ae_fpm_tables.h create mode 100644 drivers/common/cnxk/roc_cpt.c create mode 100644 drivers/common/cnxk/roc_cpt.h create mode 100644 drivers/common/cnxk/roc_cpt_debug.c create mode 100644 drivers/common/cnxk/roc_cpt_priv.h create mode 100644 drivers/common/cnxk/roc_ie.h create mode 100644 drivers/common/cnxk/roc_ie_on.h create mode 100644 drivers/common/cnxk/roc_ie_ot.h create mode 100644 drivers/common/cnxk/roc_se.c create mode 100644 drivers/common/cnxk/roc_se.h
Comments
> This patchset adds initial support for CPT in common code for Marvell CN10K > SoC. > > CPT is the hardware cryptographic block available in 'cnxk' family SoC. CPT, > with its microcoded engines can support symmetric, asymmetric and IPsec > operations. CPT can associate with NIX (rte_ethdev) to enable inline IPsec > functionality. Similarly, CPT can associate with SSO (rte_eventdev) to > enable crypto adapter. > > Based on CNXK common driver, new crypto PMDs would be added under > 'crypto/cnxk'. > > Changes in v2 > - Moved FPM & EC tables to RoC > - Moved set_key routines to RoC > - Added inline IPsec required mboxes and framework > - Added security common code > - Added plt_dp_* log based on Akhil's comment > Series Acked-by: Akhil Goyal <gakhil@marvell.com>
> > This patchset adds initial support for CPT in common code for Marvell > CN10K > > SoC. > > > > CPT is the hardware cryptographic block available in 'cnxk' family SoC. CPT, > > with its microcoded engines can support symmetric, asymmetric and IPsec > > operations. CPT can associate with NIX (rte_ethdev) to enable inline IPsec > > functionality. Similarly, CPT can associate with SSO (rte_eventdev) to > > enable crypto adapter. > > > > Based on CNXK common driver, new crypto PMDs would be added under > > 'crypto/cnxk'. > > > > Changes in v2 > > - Moved FPM & EC tables to RoC > > - Moved set_key routines to RoC > > - Added inline IPsec required mboxes and framework > > - Added security common code > > - Added plt_dp_* log based on Akhil's comment > > > Series Acked-by: Akhil Goyal <gakhil@marvell.com> A couple of small issues fixed while applying in patch title/description. Applied to dpdk-next-crypto Thanks.