Message ID | 20210112025709.1121523-1-ruifeng.wang@arm.com (mailing list archive) |
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Headers |
Return-Path: <dev-bounces@dpdk.org> X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 47BC5A04B5; Tue, 12 Jan 2021 03:57:27 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B849B140CD7; Tue, 12 Jan 2021 03:57:26 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id EF6F9140CAF for <dev@dpdk.org>; Tue, 12 Jan 2021 03:57:24 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2E315101E; Mon, 11 Jan 2021 18:57:24 -0800 (PST) Received: from net-arm-n1amp-01.shanghai.arm.com (net-arm-n1amp-01.shanghai.arm.com [10.169.208.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7B9B43F66E; Mon, 11 Jan 2021 18:57:21 -0800 (PST) From: Ruifeng Wang <ruifeng.wang@arm.com> To: Cc: dev@dpdk.org, vladimir.medvedkin@intel.com, pbhagavatula@marvell.com, jerinj@marvell.com, hemant.agrawal@nxp.com, honnappa.nagarahalli@arm.com, nd@arm.com, Ruifeng Wang <ruifeng.wang@arm.com> Date: Tue, 12 Jan 2021 02:57:03 +0000 Message-Id: <20210112025709.1121523-1-ruifeng.wang@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201218101210.356836-1-ruifeng.wang@arm.com> References: <20201218101210.356836-1-ruifeng.wang@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 0/5] lpm lookup with sve support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions <dev.dpdk.org> List-Unsubscribe: <https://mails.dpdk.org/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://mails.dpdk.org/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <https://mails.dpdk.org/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> Errors-To: dev-bounces@dpdk.org Sender: "dev" <dev-bounces@dpdk.org> |
Series | lpm lookup with sve support | |
Message
Ruifeng Wang
Jan. 12, 2021, 2:57 a.m. UTC
Added lpm4 lookupx4 implementation by using Arm SVE extension. The SVE is Scalable Vector Extension which is exposed to the user with a vector length agnostic interface. Refer to [1] for more information about SVE. Configuration was added for Neoverse N2 CPU which has SVE support. Some bugs were fixed so compiling with sve enabled can pass. [1] https://developer.arm.com/tools-and-software/server-and-hpc/compile/arm-instruction-emulator/resources/tutorials/sve --- v2: Fixed tbl8 group index calculation. (Vladimir) Added N2 config. Fixed compiling when sve was enabled. Ruifeng Wang (5): lpm: add sve support for lookup on Arm platform net/hns3: fix build with sve enabled net/octeontx: fix build with sve enabled common/octeontx2: fix build with sve enabled config: add Arm Neoverse N2 config/arm/arm64_n2_linux_gcc | 17 +++++ config/arm/meson.build | 11 +++- drivers/common/octeontx2/otx2_io_arm64.h | 15 +++-- drivers/net/hns3/hns3_rxtx.c | 4 +- drivers/net/hns3/meson.build | 1 - drivers/net/octeontx/base/octeontx_io.h | 10 ++- lib/librte_eal/arm/include/rte_vect.h | 3 + lib/librte_lpm/meson.build | 2 +- lib/librte_lpm/rte_lpm.h | 4 ++ lib/librte_lpm/rte_lpm_sve.h | 83 ++++++++++++++++++++++++ 10 files changed, 139 insertions(+), 11 deletions(-) create mode 100644 config/arm/arm64_n2_linux_gcc create mode 100644 lib/librte_lpm/rte_lpm_sve.h
Comments
Ruifeng, Honnappa, On Tue, Jan 12, 2021 at 3:57 AM Ruifeng Wang <ruifeng.wang@arm.com> wrote: > > Added lpm4 lookupx4 implementation by using Arm SVE extension. > The SVE is Scalable Vector Extension which is exposed to the > user with a vector length agnostic interface. > Refer to [1] for more information about SVE. > > Configuration was added for Neoverse N2 CPU which has SVE support. > > Some bugs were fixed so compiling with sve enabled can pass. > > [1] https://developer.arm.com/tools-and-software/server-and-hpc/compile/arm-instruction-emulator/resources/tutorials/sve Can you point at a toolchain that supports SVE without having to register to some commercial spamming system? :-) The only aarch64-linux-gnu- toolchain I found on the ARM website is a 8.x gcc that does not seem to support SVE.
On Thu, Jan 14, 2021 at 4:18 PM David Marchand <david.marchand@redhat.com> wrote: > > Ruifeng, Honnappa, > > On Tue, Jan 12, 2021 at 3:57 AM Ruifeng Wang <ruifeng.wang@arm.com> wrote: > > > > Added lpm4 lookupx4 implementation by using Arm SVE extension. > > The SVE is Scalable Vector Extension which is exposed to the > > user with a vector length agnostic interface. > > Refer to [1] for more information about SVE. > > > > Configuration was added for Neoverse N2 CPU which has SVE support. > > > > Some bugs were fixed so compiling with sve enabled can pass. > > > > [1] https://developer.arm.com/tools-and-software/server-and-hpc/compile/arm-instruction-emulator/resources/tutorials/sve > > Can you point at a toolchain that supports SVE without having to > register to some commercial spamming system? :-) > The only aarch64-linux-gnu- toolchain I found on the ARM website is a > 8.x gcc that does not seem to support SVE. I tested this using https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2-2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-aarch64-none-linux-gnu.tar.xz But I had to modify the cross compile prefix in config/arm/arm64_n2_linux_gcc (adding a none_). I am still interested in a toolchain that works out of the box. Series applied, thanks.
> -----Original Message----- > From: David Marchand <david.marchand@redhat.com> > Sent: Thursday, January 14, 2021 11:40 PM > To: Ruifeng Wang <Ruifeng.Wang@arm.com>; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com> > Cc: dev <dev@dpdk.org>; Vladimir Medvedkin > <vladimir.medvedkin@intel.com>; Pavan Nikhilesh > <pbhagavatula@marvell.com>; jerinj@marvell.com; > hemant.agrawal@nxp.com; nd <nd@arm.com> > Subject: Re: [dpdk-dev] [PATCH v3 0/5] lpm lookup with sve support > > On Thu, Jan 14, 2021 at 4:18 PM David Marchand > <david.marchand@redhat.com> wrote: > > > > Ruifeng, Honnappa, > > > > On Tue, Jan 12, 2021 at 3:57 AM Ruifeng Wang <ruifeng.wang@arm.com> > wrote: > > > > > > Added lpm4 lookupx4 implementation by using Arm SVE extension. > > > The SVE is Scalable Vector Extension which is exposed to the user > > > with a vector length agnostic interface. > > > Refer to [1] for more information about SVE. > > > > > > Configuration was added for Neoverse N2 CPU which has SVE support. > > > > > > Some bugs were fixed so compiling with sve enabled can pass. > > > > > > [1] > > > https://developer.arm.com/tools-and-software/server-and- > hpc/compile/ > > > arm-instruction-emulator/resources/tutorials/sve > > > > Can you point at a toolchain that supports SVE without having to > > register to some commercial spamming system? :-) The only > > aarch64-linux-gnu- toolchain I found on the ARM website is a 8.x gcc > > that does not seem to support SVE. > > I tested this using > https://developer.arm.com/-/media/Files/downloads/gnu-a/10.2- > 2020.11/binrel/gcc-arm-10.2-2020.11-x86_64-aarch64-none-linux-gnu.tar.xz Yes, gcc-10 has SVE support. Arm cross compilers available at: https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a/downloads > But I had to modify the cross compile prefix in > config/arm/arm64_n2_linux_gcc (adding a none_). > I am still interested in a toolchain that works out of the box. I think on Ubuntu, it will work out of the box after installing package gcc-10-aarch64-linux-gnu. > > Series applied, thanks. Thank you. > > > -- > David Marchand