[v2,11/29] net/ena/base: use 48-bit memory addresses in ena_com
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Commit Message
ENA device is using 48-bit memory for IO. because of that, the upper
limit had to be updated.
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Reviewed-by: Igor Chauskin <igorch@amazon.com>
Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
---
drivers/net/ena/base/ena_com.c | 2 +-
drivers/net/ena/base/ena_defs/ena_common_defs.h | 6 +++++-
2 files changed, 6 insertions(+), 2 deletions(-)
Comments
On 4/1/2020 3:21 PM, Michal Krawczyk wrote:
> ENA device is using 48-bit memory for IO. because of that, the upper
> limit had to be updated.
What is the impact of this change, and what is the reason of the change? Can you
please explain in the commit log?
>
> Signed-off-by: Michal Krawczyk <mk@semihalf.com>
> Reviewed-by: Igor Chauskin <igorch@amazon.com>
> Reviewed-by: Guy Tzalik <gtzalik@amazon.com>
> ---
> drivers/net/ena/base/ena_com.c | 2 +-
> drivers/net/ena/base/ena_defs/ena_common_defs.h | 6 +++++-
> 2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ena/base/ena_com.c b/drivers/net/ena/base/ena_com.c
> index 7c1d0aef20..b7749209b3 100644
> --- a/drivers/net/ena/base/ena_com.c
> +++ b/drivers/net/ena/base/ena_com.c
> @@ -73,7 +73,7 @@ static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
> }
>
> ena_addr->mem_addr_low = lower_32_bits(addr);
> - ena_addr->mem_addr_high = upper_32_bits(addr);
> + ena_addr->mem_addr_high = (u16)upper_32_bits(addr);
>
> return 0;
> }
> diff --git a/drivers/net/ena/base/ena_defs/ena_common_defs.h b/drivers/net/ena/base/ena_defs/ena_common_defs.h
> index 1818c29a87..349474d265 100644
> --- a/drivers/net/ena/base/ena_defs/ena_common_defs.h
> +++ b/drivers/net/ena/base/ena_defs/ena_common_defs.h
> @@ -9,10 +9,14 @@
> #define ENA_COMMON_SPEC_VERSION_MAJOR 2
> #define ENA_COMMON_SPEC_VERSION_MINOR 0
>
> +/* ENA operates with 48-bit memory addresses. ena_mem_addr_t */
> struct ena_common_mem_addr {
> uint32_t mem_addr_low;
>
> - uint32_t mem_addr_high;
> + uint16_t mem_addr_high;
> +
> + /* MBZ */
> + uint16_t reserved16;
> };
>
> #endif /* _ENA_COMMON_H_ */
>
czw., 2 kwi 2020 o 14:55 Ferruh Yigit <ferruh.yigit@intel.com> napisał(a):
>
> On 4/1/2020 3:21 PM, Michal Krawczyk wrote:
> > ENA device is using 48-bit memory for IO. because of that, the upper
> > limit had to be updated.
>
> What is the impact of this change, and what is the reason of the change? Can you
> please explain in the commit log?
>
It's just a cosmetic change in our case and to align it with what the
device is in fact doing. Structure 'ena_common_mem_addr' could be
misleading - it was defining 64 bits for address, while the device in
fact could read up to 48 bits.
This value (address) is being verified before being set in
'ena_com_mem_addr_set()' function, so the functionality remains still
the same.
I'll update the commit log in v3.
@@ -73,7 +73,7 @@ static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
}
ena_addr->mem_addr_low = lower_32_bits(addr);
- ena_addr->mem_addr_high = upper_32_bits(addr);
+ ena_addr->mem_addr_high = (u16)upper_32_bits(addr);
return 0;
}
@@ -9,10 +9,14 @@
#define ENA_COMMON_SPEC_VERSION_MAJOR 2
#define ENA_COMMON_SPEC_VERSION_MINOR 0
+/* ENA operates with 48-bit memory addresses. ena_mem_addr_t */
struct ena_common_mem_addr {
uint32_t mem_addr_low;
- uint32_t mem_addr_high;
+ uint16_t mem_addr_high;
+
+ /* MBZ */
+ uint16_t reserved16;
};
#endif /* _ENA_COMMON_H_ */