[v4] net/octeontx2: add set supported types op

  From: Pavan Nikhilesh <pbhagavatula@marvell.com>

Add support to set supported ptypes for octeontx2.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
 v4 Changes:
 ----------
 - Rebase onto series
   http://patches.dpdk.org/project/dpdk/list/?series=7302.

 v3 Changes:
 ----------
 - Actually update doc file.

 v2 Changes:
 ----------
 - Update documentation.
 - Use positive logic.

 doc/guides/nics/octeontx2.rst               |  5 -----
 drivers/net/octeontx2/otx2_ethdev.c         |  1 +
 drivers/net/octeontx2/otx2_ethdev.h         |  1 +
 drivers/net/octeontx2/otx2_ethdev_devargs.c | 21 ---------------------
 drivers/net/octeontx2/otx2_lookup.c         | 15 +++++++++++++++
 5 files changed, 17 insertions(+), 26 deletions(-)

--
2.17.1
  

On Thu, Nov 7, 2019 at 8:23 AM <pbhagavatula@marvell.com> wrote:
>
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
> Add support to set supported ptypes for octeontx2.

Added extra git commit log:

    Add support to set supported ptypes for octeontx2 and
    remove devarg scheme to disable ptype parsing support as
    application can use rte_eth_dev_set_ptypes() normative API
    to enable the same use case.

>
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

Acked-by: Jerin Jacob <jerinj@marvell.com>

Applied to dpdk-next-net-mrvl/master. Thanks


> ---
>  v4 Changes:
>  ----------
>  - Rebase onto series
>    http://patches.dpdk.org/project/dpdk/list/?series=7302.
>
>  v3 Changes:
>  ----------
>  - Actually update doc file.
>
>  v2 Changes:
>  ----------
>  - Update documentation.
>  - Use positive logic.
>
>  doc/guides/nics/octeontx2.rst               |  5 -----
>  drivers/net/octeontx2/otx2_ethdev.c         |  1 +
>  drivers/net/octeontx2/otx2_ethdev.h         |  1 +
>  drivers/net/octeontx2/otx2_ethdev_devargs.c | 21 ---------------------
>  drivers/net/octeontx2/otx2_lookup.c         | 15 +++++++++++++++
>  5 files changed, 17 insertions(+), 26 deletions(-)
>
> diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
> index eb7aaa468..026df44e6 100644
> --- a/doc/guides/nics/octeontx2.rst
> +++ b/doc/guides/nics/octeontx2.rst
> @@ -113,11 +113,6 @@ use arm64-octeontx2-linux-gcc as target.
>  Runtime Config Options
>  ----------------------
>
> -- ``HW offload ptype parsing disable`` (default ``0``)
> -
> -   Packet type parsing is HW offloaded by default and this feature may be toggled
> -   using ``ptype_disable`` ``devargs`` parameter.
> -
>  - ``Rx&Tx scalar mode enable`` (default ``0``)
>
>     Ethdev supports both scalar and vector mode, it may be selected at runtime
> diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
> index dfa8cd205..db18e4cb9 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.c
> +++ b/drivers/net/octeontx2/otx2_ethdev.c
> @@ -1983,6 +1983,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
>         .dev_set_link_up          = otx2_nix_dev_set_link_up,
>         .dev_set_link_down        = otx2_nix_dev_set_link_down,
>         .dev_supported_ptypes_get = otx2_nix_supported_ptypes_get,
> +       .dev_ptypes_set           = otx2_nix_ptypes_set,
>         .dev_reset                = otx2_nix_dev_reset,
>         .stats_get                = otx2_nix_dev_stats_get,
>         .stats_reset              = otx2_nix_dev_stats_reset,
> diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
> index 4d9ed4870..b65891a5b 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.h
> +++ b/drivers/net/octeontx2/otx2_ethdev.h
> @@ -525,6 +525,7 @@ void *otx2_nix_fastpath_lookup_mem_get(void);
>
>  /* PTYPES */
>  const uint32_t *otx2_nix_supported_ptypes_get(struct rte_eth_dev *dev);
> +int otx2_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t ptype_mask);
>
>  /* Mac address handling */
>  int otx2_nix_mac_addr_set(struct rte_eth_dev *eth_dev,
> diff --git a/drivers/net/octeontx2/otx2_ethdev_devargs.c b/drivers/net/octeontx2/otx2_ethdev_devargs.c
> index ca9a5ffb8..04da1abbd 100644
> --- a/drivers/net/octeontx2/otx2_ethdev_devargs.c
> +++ b/drivers/net/octeontx2/otx2_ethdev_devargs.c
> @@ -63,21 +63,6 @@ parse_reta_size(const char *key, const char *value, void *extra_args)
>         return 0;
>  }
>
> -static int
> -parse_ptype_flag(const char *key, const char *value, void *extra_args)
> -{
> -       RTE_SET_USED(key);
> -       uint32_t val;
> -
> -       val = atoi(value);
> -       if (val)
> -               val = 0; /* Disable NIX_RX_OFFLOAD_PTYPE_F */
> -
> -       *(uint16_t *)extra_args = val;
> -
> -       return 0;
> -}
> -
>  static int
>  parse_flag(const char *key, const char *value, void *extra_args)
>  {
> @@ -119,7 +104,6 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
>  }
>
>  #define OTX2_RSS_RETA_SIZE "reta_size"
> -#define OTX2_PTYPE_DISABLE "ptype_disable"
>  #define OTX2_SCL_ENABLE "scalar_enable"
>  #define OTX2_MAX_SQB_COUNT "max_sqb_count"
>  #define OTX2_FLOW_PREALLOC_SIZE "flow_prealloc_size"
> @@ -129,7 +113,6 @@ parse_switch_header_type(const char *key, const char *value, void *extra_args)
>  int
>  otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
>  {
> -       uint16_t offload_flag = NIX_RX_OFFLOAD_PTYPE_F;
>         uint16_t rss_size = NIX_RSS_RETA_SIZE;
>         uint16_t sqb_count = NIX_MAX_SQB;
>         uint16_t flow_prealloc_size = 8;
> @@ -145,8 +128,6 @@ otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
>         if (kvlist == NULL)
>                 goto exit;
>
> -       rte_kvargs_process(kvlist, OTX2_PTYPE_DISABLE,
> -                          &parse_ptype_flag, &offload_flag);
>         rte_kvargs_process(kvlist, OTX2_RSS_RETA_SIZE,
>                            &parse_reta_size, &rss_size);
>         rte_kvargs_process(kvlist, OTX2_SCL_ENABLE,
> @@ -162,7 +143,6 @@ otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
>         rte_kvargs_free(kvlist);
>
>  null_devargs:
> -       dev->rx_offload_flags = offload_flag;
>         dev->scalar_ena = scalar_enable;
>         dev->max_sqb_count = sqb_count;
>         dev->rss_info.rss_size = rss_size;
> @@ -177,7 +157,6 @@ otx2_ethdev_parse_devargs(struct rte_devargs *devargs, struct otx2_eth_dev *dev)
>
>  RTE_PMD_REGISTER_PARAM_STRING(net_octeontx2,
>                               OTX2_RSS_RETA_SIZE "=<64|128|256>"
> -                             OTX2_PTYPE_DISABLE "=1"
>                               OTX2_SCL_ENABLE "=1"
>                               OTX2_MAX_SQB_COUNT "=<8-512>"
>                               OTX2_FLOW_PREALLOC_SIZE "=<1-32>"
> diff --git a/drivers/net/octeontx2/otx2_lookup.c b/drivers/net/octeontx2/otx2_lookup.c
> index 3071278fc..17c44e20e 100644
> --- a/drivers/net/octeontx2/otx2_lookup.c
> +++ b/drivers/net/octeontx2/otx2_lookup.c
> @@ -62,6 +62,21 @@ otx2_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
>                 return NULL;
>  }
>
> +int
> +otx2_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t ptype_mask)
> +{
> +       struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
> +
> +       if (ptype_mask)
> +               dev->rx_offload_flags |= NIX_RX_OFFLOAD_PTYPE_F;
> +       else
> +               dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_PTYPE_F;
> +
> +       otx2_eth_set_rx_function(eth_dev);
> +
> +       return 0;
> +}
> +
>  /*
>   * +------------------ +------------------ +
>   * |  | IL4 | IL3| IL2 | TU | L4 | L3 | L2 |
> --
> 2.17.1
>
  

On 11/7/2019 2:52 AM, pbhagavatula@marvell.com wrote:
> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
> 
> Add support to set supported ptypes for octeontx2.
> 
> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

<...>

> @@ -62,6 +62,21 @@ otx2_nix_supported_ptypes_get(struct rte_eth_dev *eth_dev)
>  		return NULL;
>  }
> 
> +int
> +otx2_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t ptype_mask)
> +{
> +	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
> +
> +	if (ptype_mask)
> +		dev->rx_offload_flags |= NIX_RX_OFFLOAD_PTYPE_F;
> +	else
> +		dev->rx_offload_flags &= ~NIX_RX_OFFLOAD_PTYPE_F;
> +
> +	otx2_eth_set_rx_function(eth_dev);
> +
> +	return 0;

Aren't you using 'ptype_mask' value? Is it just used to enable/disable?
  

>On 11/7/2019 2:52 AM, pbhagavatula@marvell.com wrote:
>> From: Pavan Nikhilesh <pbhagavatula@marvell.com>
>>
>> Add support to set supported ptypes for octeontx2.
>>
>> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
>
><...>
>
>> @@ -62,6 +62,21 @@ otx2_nix_supported_ptypes_get(struct
>rte_eth_dev *eth_dev)
>>  		return NULL;
>>  }
>>
>> +int
>> +otx2_nix_ptypes_set(struct rte_eth_dev *eth_dev, uint32_t
>ptype_mask)
>> +{
>> +	struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
>> +
>> +	if (ptype_mask)
>> +		dev->rx_offload_flags |= NIX_RX_OFFLOAD_PTYPE_F;
>> +	else
>> +		dev->rx_offload_flags &=
>~NIX_RX_OFFLOAD_PTYPE_F;
>> +
>> +	otx2_eth_set_rx_function(eth_dev);
>> +
>> +	return 0;
>
>Aren't you using 'ptype_mask' value? Is it just used to enable/disable?

Yes, currently it's just to enable/disable. Later we plan to resize our internal array.