[1/2,v2] event/dpaa2: set priority as per the dpcon device
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Commit Message
This patch sets the priority of the dpcon dev, such that it is
within the supported range of dpcon
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 11 +++++++++++
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 10 +++++++---
drivers/crypto/dpaa2_sec/dpaa2_sec_event.h | 2 +-
drivers/event/dpaa2/dpaa2_eventdev.c | 17 ++++++++---------
drivers/event/dpaa2/dpaa2_eventdev.h | 11 -----------
drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++++++----
drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
7 files changed, 35 insertions(+), 29 deletions(-)
Comments
Forgot to add in patch:
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> -----Original Message-----
> From: Nipun Gupta <nipun.gupta@nxp.com>
> Sent: Thursday, October 17, 2019 1:59 PM
> To: dev@dpdk.org
> Cc: jerinj@marvell.com; Hemant Agrawal <hemant.agrawal@nxp.com>;
> Nipun Gupta <nipun.gupta@nxp.com>
> Subject: [PATCH 1/2 v2] event/dpaa2: set priority as per the dpcon device
>
> This patch sets the priority of the dpcon dev, such that it is
> within the supported range of dpcon
>
> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
> ---
> drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 11 +++++++++++
> drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 10 +++++++---
> drivers/crypto/dpaa2_sec/dpaa2_sec_event.h | 2 +-
> drivers/event/dpaa2/dpaa2_eventdev.c | 17 ++++++++---------
> drivers/event/dpaa2/dpaa2_eventdev.h | 11 -----------
> drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++++++----
> drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
> 7 files changed, 35 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> index 5087f68c6..db6dad544 100644
> --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> @@ -185,6 +185,17 @@ struct dpaa2_dpci_dev {
> struct dpaa2_queue tx_queue[DPAA2_DPCI_MAX_QUEUES];
> };
>
> +struct dpaa2_dpcon_dev {
> + TAILQ_ENTRY(dpaa2_dpcon_dev) next;
> + struct fsl_mc_io dpcon;
> + uint16_t token;
> + rte_atomic16_t in_use;
> + uint32_t dpcon_id;
> + uint16_t qbman_ch_id;
> + uint8_t num_priorities;
> + uint8_t channel_index;
> +};
> +
> /*! Global MCP list */
> extern void *(*rte_mcp_ptr_list);
>
> diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> index 2ab34a00f..5db3f9540 100644
> --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> @@ -3487,13 +3487,14 @@ dpaa2_sec_process_atomic_event(struct
> qbman_swp *swp __attribute__((unused)),
> int
> dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
> int qp_id,
> - uint16_t dpcon_id,
> + struct dpaa2_dpcon_dev *dpcon,
> const struct rte_event *event)
> {
> struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
> struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
> struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id];
> struct dpseci_rx_queue_cfg cfg;
> + uint8_t priority;
> int ret;
>
> if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
> @@ -3503,11 +3504,14 @@ dpaa2_sec_eventq_attach(const struct
> rte_cryptodev *dev,
> else
> return -EINVAL;
>
> + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / event->priority) *
> + (dpcon->num_priorities - 1);
> +
> memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
> cfg.options = DPSECI_QUEUE_OPT_DEST;
> cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON;
> - cfg.dest_cfg.dest_id = dpcon_id;
> - cfg.dest_cfg.priority = event->priority;
> + cfg.dest_cfg.dest_id = dpcon->dpcon_id;
> + cfg.dest_cfg.priority = priority;
>
> cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
> cfg.user_ctx = (size_t)(qp);
> diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> index 977099429..c779d5d83 100644
> --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> @@ -9,7 +9,7 @@
> int
> dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
> int qp_id,
> - uint16_t dpcon_id,
> + struct dpaa2_dpcon_dev *dpcon,
> const struct rte_event *event);
>
> int dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
> diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c
> b/drivers/event/dpaa2/dpaa2_eventdev.c
> index 5249d2fe4..56cea5f90 100644
> --- a/drivers/event/dpaa2/dpaa2_eventdev.c
> +++ b/drivers/event/dpaa2/dpaa2_eventdev.c
> @@ -688,14 +688,14 @@ dpaa2_eventdev_eth_queue_add_all(const struct
> rte_eventdev *dev,
> {
> struct dpaa2_eventdev *priv = dev->data->dev_private;
> uint8_t ev_qid = queue_conf->ev.queue_id;
> - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> int i, ret;
>
> EVENTDEV_INIT_FUNC_TRACE();
>
> for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
> ret = dpaa2_eth_eventq_attach(eth_dev, i,
> - dpcon_id, queue_conf);
> + dpcon, queue_conf);
> if (ret) {
> DPAA2_EVENTDEV_ERR(
> "Event queue attach failed: err(%d)", ret);
> @@ -718,7 +718,7 @@ dpaa2_eventdev_eth_queue_add(const struct
> rte_eventdev *dev,
> {
> struct dpaa2_eventdev *priv = dev->data->dev_private;
> uint8_t ev_qid = queue_conf->ev.queue_id;
> - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> int ret;
>
> EVENTDEV_INIT_FUNC_TRACE();
> @@ -728,7 +728,7 @@ dpaa2_eventdev_eth_queue_add(const struct
> rte_eventdev *dev,
> eth_dev, queue_conf);
>
> ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
> - dpcon_id, queue_conf);
> + dpcon, queue_conf);
> if (ret) {
> DPAA2_EVENTDEV_ERR(
> "Event queue attach failed: err(%d)", ret);
> @@ -831,14 +831,13 @@ dpaa2_eventdev_crypto_queue_add_all(const
> struct rte_eventdev *dev,
> {
> struct dpaa2_eventdev *priv = dev->data->dev_private;
> uint8_t ev_qid = ev->queue_id;
> - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> int i, ret;
>
> EVENTDEV_INIT_FUNC_TRACE();
>
> for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
> - ret = dpaa2_sec_eventq_attach(cryptodev, i,
> - dpcon_id, ev);
> + ret = dpaa2_sec_eventq_attach(cryptodev, i, dpcon, ev);
> if (ret) {
> DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach
> failed: ret %d\n",
> ret);
> @@ -861,7 +860,7 @@ dpaa2_eventdev_crypto_queue_add(const struct
> rte_eventdev *dev,
> {
> struct dpaa2_eventdev *priv = dev->data->dev_private;
> uint8_t ev_qid = ev->queue_id;
> - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> int ret;
>
> EVENTDEV_INIT_FUNC_TRACE();
> @@ -871,7 +870,7 @@ dpaa2_eventdev_crypto_queue_add(const struct
> rte_eventdev *dev,
> cryptodev, ev);
>
> ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
> - dpcon_id, ev);
> + dpcon, ev);
> if (ret) {
> DPAA2_EVENTDEV_ERR(
> "dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
> diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h
> b/drivers/event/dpaa2/dpaa2_eventdev.h
> index abc038e49..7c5d00550 100644
> --- a/drivers/event/dpaa2/dpaa2_eventdev.h
> +++ b/drivers/event/dpaa2/dpaa2_eventdev.h
> @@ -52,17 +52,6 @@ enum {
> * the ethdev to eventdev with DPAA2 devices.
> */
>
> -struct dpaa2_dpcon_dev {
> - TAILQ_ENTRY(dpaa2_dpcon_dev) next;
> - struct fsl_mc_io dpcon;
> - uint16_t token;
> - rte_atomic16_t in_use;
> - uint32_t dpcon_id;
> - uint16_t qbman_ch_id;
> - uint8_t num_priorities;
> - uint8_t channel_index;
> -};
> -
> struct dpaa2_eventq {
> /* DPcon device */
> struct dpaa2_dpcon_dev *dpcon;
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c
> b/drivers/net/dpaa2/dpaa2_ethdev.c
> index 848bb421e..d241643d8 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.c
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.c
> @@ -2006,7 +2006,7 @@ dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev
> *dev,
>
> int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
> int eth_rx_queue_id,
> - uint16_t dpcon_id,
> + struct dpaa2_dpcon_dev *dpcon,
> const struct rte_event_eth_rx_adapter_queue_conf
> *queue_conf)
> {
> struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
> @@ -2014,7 +2014,7 @@ int dpaa2_eth_eventq_attach(const struct
> rte_eth_dev *dev,
> struct dpaa2_queue *dpaa2_ethq = eth_priv-
> >rx_vq[eth_rx_queue_id];
> uint8_t flow_id = dpaa2_ethq->flow_id;
> struct dpni_queue cfg;
> - uint8_t options;
> + uint8_t options, priority;
> int ret;
>
> if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
> @@ -2026,11 +2026,14 @@ int dpaa2_eth_eventq_attach(const struct
> rte_eth_dev *dev,
> else
> return -EINVAL;
>
> + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf-
> >ev.priority) *
> + (dpcon->num_priorities - 1);
> +
> memset(&cfg, 0, sizeof(struct dpni_queue));
> options = DPNI_QUEUE_OPT_DEST;
> cfg.destination.type = DPNI_DEST_DPCON;
> - cfg.destination.id = dpcon_id;
> - cfg.destination.priority = queue_conf->ev.priority;
> + cfg.destination.id = dpcon->dpcon_id;
> + cfg.destination.priority = priority;
>
> if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
> options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h
> b/drivers/net/dpaa2/dpaa2_ethdev.h
> index 823f9e97c..95674b26b 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.h
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.h
> @@ -164,7 +164,7 @@ int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
> void *blist);
>
> int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
> int eth_rx_queue_id,
> - uint16_t dpcon_id,
> + struct dpaa2_dpcon_dev *dpcon,
> const struct rte_event_eth_rx_adapter_queue_conf
> *queue_conf);
>
> int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
> --
> 2.17.1
On Thu, Oct 17, 2019 at 2:17 PM Nipun Gupta <nipun.gupta@nxp.com> wrote:
>
> Forgot to add in patch:
>
> Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Series applied to dpdk-next-eventdev/master. Thanks.
>
> > -----Original Message-----
> > From: Nipun Gupta <nipun.gupta@nxp.com>
> > Sent: Thursday, October 17, 2019 1:59 PM
> > To: dev@dpdk.org
> > Cc: jerinj@marvell.com; Hemant Agrawal <hemant.agrawal@nxp.com>;
> > Nipun Gupta <nipun.gupta@nxp.com>
> > Subject: [PATCH 1/2 v2] event/dpaa2: set priority as per the dpcon device
> >
> > This patch sets the priority of the dpcon dev, such that it is
> > within the supported range of dpcon
> >
> > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
> > ---
> > drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 11 +++++++++++
> > drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 10 +++++++---
> > drivers/crypto/dpaa2_sec/dpaa2_sec_event.h | 2 +-
> > drivers/event/dpaa2/dpaa2_eventdev.c | 17 ++++++++---------
> > drivers/event/dpaa2/dpaa2_eventdev.h | 11 -----------
> > drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++++++----
> > drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
> > 7 files changed, 35 insertions(+), 29 deletions(-)
> >
> > diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > index 5087f68c6..db6dad544 100644
> > --- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > +++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
> > @@ -185,6 +185,17 @@ struct dpaa2_dpci_dev {
> > struct dpaa2_queue tx_queue[DPAA2_DPCI_MAX_QUEUES];
> > };
> >
> > +struct dpaa2_dpcon_dev {
> > + TAILQ_ENTRY(dpaa2_dpcon_dev) next;
> > + struct fsl_mc_io dpcon;
> > + uint16_t token;
> > + rte_atomic16_t in_use;
> > + uint32_t dpcon_id;
> > + uint16_t qbman_ch_id;
> > + uint8_t num_priorities;
> > + uint8_t channel_index;
> > +};
> > +
> > /*! Global MCP list */
> > extern void *(*rte_mcp_ptr_list);
> >
> > diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > index 2ab34a00f..5db3f9540 100644
> > --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> > @@ -3487,13 +3487,14 @@ dpaa2_sec_process_atomic_event(struct
> > qbman_swp *swp __attribute__((unused)),
> > int
> > dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
> > int qp_id,
> > - uint16_t dpcon_id,
> > + struct dpaa2_dpcon_dev *dpcon,
> > const struct rte_event *event)
> > {
> > struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
> > struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
> > struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id];
> > struct dpseci_rx_queue_cfg cfg;
> > + uint8_t priority;
> > int ret;
> >
> > if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
> > @@ -3503,11 +3504,14 @@ dpaa2_sec_eventq_attach(const struct
> > rte_cryptodev *dev,
> > else
> > return -EINVAL;
> >
> > + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / event->priority) *
> > + (dpcon->num_priorities - 1);
> > +
> > memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
> > cfg.options = DPSECI_QUEUE_OPT_DEST;
> > cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON;
> > - cfg.dest_cfg.dest_id = dpcon_id;
> > - cfg.dest_cfg.priority = event->priority;
> > + cfg.dest_cfg.dest_id = dpcon->dpcon_id;
> > + cfg.dest_cfg.priority = priority;
> >
> > cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
> > cfg.user_ctx = (size_t)(qp);
> > diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> > b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> > index 977099429..c779d5d83 100644
> > --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> > +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_event.h
> > @@ -9,7 +9,7 @@
> > int
> > dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
> > int qp_id,
> > - uint16_t dpcon_id,
> > + struct dpaa2_dpcon_dev *dpcon,
> > const struct rte_event *event);
> >
> > int dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
> > diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c
> > b/drivers/event/dpaa2/dpaa2_eventdev.c
> > index 5249d2fe4..56cea5f90 100644
> > --- a/drivers/event/dpaa2/dpaa2_eventdev.c
> > +++ b/drivers/event/dpaa2/dpaa2_eventdev.c
> > @@ -688,14 +688,14 @@ dpaa2_eventdev_eth_queue_add_all(const struct
> > rte_eventdev *dev,
> > {
> > struct dpaa2_eventdev *priv = dev->data->dev_private;
> > uint8_t ev_qid = queue_conf->ev.queue_id;
> > - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> > int i, ret;
> >
> > EVENTDEV_INIT_FUNC_TRACE();
> >
> > for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
> > ret = dpaa2_eth_eventq_attach(eth_dev, i,
> > - dpcon_id, queue_conf);
> > + dpcon, queue_conf);
> > if (ret) {
> > DPAA2_EVENTDEV_ERR(
> > "Event queue attach failed: err(%d)", ret);
> > @@ -718,7 +718,7 @@ dpaa2_eventdev_eth_queue_add(const struct
> > rte_eventdev *dev,
> > {
> > struct dpaa2_eventdev *priv = dev->data->dev_private;
> > uint8_t ev_qid = queue_conf->ev.queue_id;
> > - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> > int ret;
> >
> > EVENTDEV_INIT_FUNC_TRACE();
> > @@ -728,7 +728,7 @@ dpaa2_eventdev_eth_queue_add(const struct
> > rte_eventdev *dev,
> > eth_dev, queue_conf);
> >
> > ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
> > - dpcon_id, queue_conf);
> > + dpcon, queue_conf);
> > if (ret) {
> > DPAA2_EVENTDEV_ERR(
> > "Event queue attach failed: err(%d)", ret);
> > @@ -831,14 +831,13 @@ dpaa2_eventdev_crypto_queue_add_all(const
> > struct rte_eventdev *dev,
> > {
> > struct dpaa2_eventdev *priv = dev->data->dev_private;
> > uint8_t ev_qid = ev->queue_id;
> > - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> > int i, ret;
> >
> > EVENTDEV_INIT_FUNC_TRACE();
> >
> > for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
> > - ret = dpaa2_sec_eventq_attach(cryptodev, i,
> > - dpcon_id, ev);
> > + ret = dpaa2_sec_eventq_attach(cryptodev, i, dpcon, ev);
> > if (ret) {
> > DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach
> > failed: ret %d\n",
> > ret);
> > @@ -861,7 +860,7 @@ dpaa2_eventdev_crypto_queue_add(const struct
> > rte_eventdev *dev,
> > {
> > struct dpaa2_eventdev *priv = dev->data->dev_private;
> > uint8_t ev_qid = ev->queue_id;
> > - uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
> > + struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
> > int ret;
> >
> > EVENTDEV_INIT_FUNC_TRACE();
> > @@ -871,7 +870,7 @@ dpaa2_eventdev_crypto_queue_add(const struct
> > rte_eventdev *dev,
> > cryptodev, ev);
> >
> > ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
> > - dpcon_id, ev);
> > + dpcon, ev);
> > if (ret) {
> > DPAA2_EVENTDEV_ERR(
> > "dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
> > diff --git a/drivers/event/dpaa2/dpaa2_eventdev.h
> > b/drivers/event/dpaa2/dpaa2_eventdev.h
> > index abc038e49..7c5d00550 100644
> > --- a/drivers/event/dpaa2/dpaa2_eventdev.h
> > +++ b/drivers/event/dpaa2/dpaa2_eventdev.h
> > @@ -52,17 +52,6 @@ enum {
> > * the ethdev to eventdev with DPAA2 devices.
> > */
> >
> > -struct dpaa2_dpcon_dev {
> > - TAILQ_ENTRY(dpaa2_dpcon_dev) next;
> > - struct fsl_mc_io dpcon;
> > - uint16_t token;
> > - rte_atomic16_t in_use;
> > - uint32_t dpcon_id;
> > - uint16_t qbman_ch_id;
> > - uint8_t num_priorities;
> > - uint8_t channel_index;
> > -};
> > -
> > struct dpaa2_eventq {
> > /* DPcon device */
> > struct dpaa2_dpcon_dev *dpcon;
> > diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c
> > b/drivers/net/dpaa2/dpaa2_ethdev.c
> > index 848bb421e..d241643d8 100644
> > --- a/drivers/net/dpaa2/dpaa2_ethdev.c
> > +++ b/drivers/net/dpaa2/dpaa2_ethdev.c
> > @@ -2006,7 +2006,7 @@ dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev
> > *dev,
> >
> > int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
> > int eth_rx_queue_id,
> > - uint16_t dpcon_id,
> > + struct dpaa2_dpcon_dev *dpcon,
> > const struct rte_event_eth_rx_adapter_queue_conf
> > *queue_conf)
> > {
> > struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
> > @@ -2014,7 +2014,7 @@ int dpaa2_eth_eventq_attach(const struct
> > rte_eth_dev *dev,
> > struct dpaa2_queue *dpaa2_ethq = eth_priv-
> > >rx_vq[eth_rx_queue_id];
> > uint8_t flow_id = dpaa2_ethq->flow_id;
> > struct dpni_queue cfg;
> > - uint8_t options;
> > + uint8_t options, priority;
> > int ret;
> >
> > if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
> > @@ -2026,11 +2026,14 @@ int dpaa2_eth_eventq_attach(const struct
> > rte_eth_dev *dev,
> > else
> > return -EINVAL;
> >
> > + priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf-
> > >ev.priority) *
> > + (dpcon->num_priorities - 1);
> > +
> > memset(&cfg, 0, sizeof(struct dpni_queue));
> > options = DPNI_QUEUE_OPT_DEST;
> > cfg.destination.type = DPNI_DEST_DPCON;
> > - cfg.destination.id = dpcon_id;
> > - cfg.destination.priority = queue_conf->ev.priority;
> > + cfg.destination.id = dpcon->dpcon_id;
> > + cfg.destination.priority = priority;
> >
> > if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
> > options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
> > diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h
> > b/drivers/net/dpaa2/dpaa2_ethdev.h
> > index 823f9e97c..95674b26b 100644
> > --- a/drivers/net/dpaa2/dpaa2_ethdev.h
> > +++ b/drivers/net/dpaa2/dpaa2_ethdev.h
> > @@ -164,7 +164,7 @@ int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
> > void *blist);
> >
> > int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
> > int eth_rx_queue_id,
> > - uint16_t dpcon_id,
> > + struct dpaa2_dpcon_dev *dpcon,
> > const struct rte_event_eth_rx_adapter_queue_conf
> > *queue_conf);
> >
> > int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
> > --
> > 2.17.1
>
@@ -185,6 +185,17 @@ struct dpaa2_dpci_dev {
struct dpaa2_queue tx_queue[DPAA2_DPCI_MAX_QUEUES];
};
+struct dpaa2_dpcon_dev {
+ TAILQ_ENTRY(dpaa2_dpcon_dev) next;
+ struct fsl_mc_io dpcon;
+ uint16_t token;
+ rte_atomic16_t in_use;
+ uint32_t dpcon_id;
+ uint16_t qbman_ch_id;
+ uint8_t num_priorities;
+ uint8_t channel_index;
+};
+
/*! Global MCP list */
extern void *(*rte_mcp_ptr_list);
@@ -3487,13 +3487,14 @@ dpaa2_sec_process_atomic_event(struct qbman_swp *swp __attribute__((unused)),
int
dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
int qp_id,
- uint16_t dpcon_id,
+ struct dpaa2_dpcon_dev *dpcon,
const struct rte_event *event)
{
struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
struct dpaa2_sec_qp *qp = dev->data->queue_pairs[qp_id];
struct dpseci_rx_queue_cfg cfg;
+ uint8_t priority;
int ret;
if (event->sched_type == RTE_SCHED_TYPE_PARALLEL)
@@ -3503,11 +3504,14 @@ dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
else
return -EINVAL;
+ priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / event->priority) *
+ (dpcon->num_priorities - 1);
+
memset(&cfg, 0, sizeof(struct dpseci_rx_queue_cfg));
cfg.options = DPSECI_QUEUE_OPT_DEST;
cfg.dest_cfg.dest_type = DPSECI_DEST_DPCON;
- cfg.dest_cfg.dest_id = dpcon_id;
- cfg.dest_cfg.priority = event->priority;
+ cfg.dest_cfg.dest_id = dpcon->dpcon_id;
+ cfg.dest_cfg.priority = priority;
cfg.options |= DPSECI_QUEUE_OPT_USER_CTX;
cfg.user_ctx = (size_t)(qp);
@@ -9,7 +9,7 @@
int
dpaa2_sec_eventq_attach(const struct rte_cryptodev *dev,
int qp_id,
- uint16_t dpcon_id,
+ struct dpaa2_dpcon_dev *dpcon,
const struct rte_event *event);
int dpaa2_sec_eventq_detach(const struct rte_cryptodev *dev,
@@ -688,14 +688,14 @@ dpaa2_eventdev_eth_queue_add_all(const struct rte_eventdev *dev,
{
struct dpaa2_eventdev *priv = dev->data->dev_private;
uint8_t ev_qid = queue_conf->ev.queue_id;
- uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+ struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
int i, ret;
EVENTDEV_INIT_FUNC_TRACE();
for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
ret = dpaa2_eth_eventq_attach(eth_dev, i,
- dpcon_id, queue_conf);
+ dpcon, queue_conf);
if (ret) {
DPAA2_EVENTDEV_ERR(
"Event queue attach failed: err(%d)", ret);
@@ -718,7 +718,7 @@ dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
{
struct dpaa2_eventdev *priv = dev->data->dev_private;
uint8_t ev_qid = queue_conf->ev.queue_id;
- uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+ struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
int ret;
EVENTDEV_INIT_FUNC_TRACE();
@@ -728,7 +728,7 @@ dpaa2_eventdev_eth_queue_add(const struct rte_eventdev *dev,
eth_dev, queue_conf);
ret = dpaa2_eth_eventq_attach(eth_dev, rx_queue_id,
- dpcon_id, queue_conf);
+ dpcon, queue_conf);
if (ret) {
DPAA2_EVENTDEV_ERR(
"Event queue attach failed: err(%d)", ret);
@@ -831,14 +831,13 @@ dpaa2_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
{
struct dpaa2_eventdev *priv = dev->data->dev_private;
uint8_t ev_qid = ev->queue_id;
- uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+ struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
int i, ret;
EVENTDEV_INIT_FUNC_TRACE();
for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
- ret = dpaa2_sec_eventq_attach(cryptodev, i,
- dpcon_id, ev);
+ ret = dpaa2_sec_eventq_attach(cryptodev, i, dpcon, ev);
if (ret) {
DPAA2_EVENTDEV_ERR("dpaa2_sec_eventq_attach failed: ret %d\n",
ret);
@@ -861,7 +860,7 @@ dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
{
struct dpaa2_eventdev *priv = dev->data->dev_private;
uint8_t ev_qid = ev->queue_id;
- uint16_t dpcon_id = priv->evq_info[ev_qid].dpcon->dpcon_id;
+ struct dpaa2_dpcon_dev *dpcon = priv->evq_info[ev_qid].dpcon;
int ret;
EVENTDEV_INIT_FUNC_TRACE();
@@ -871,7 +870,7 @@ dpaa2_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
cryptodev, ev);
ret = dpaa2_sec_eventq_attach(cryptodev, rx_queue_id,
- dpcon_id, ev);
+ dpcon, ev);
if (ret) {
DPAA2_EVENTDEV_ERR(
"dpaa2_sec_eventq_attach failed: ret: %d\n", ret);
@@ -52,17 +52,6 @@ enum {
* the ethdev to eventdev with DPAA2 devices.
*/
-struct dpaa2_dpcon_dev {
- TAILQ_ENTRY(dpaa2_dpcon_dev) next;
- struct fsl_mc_io dpcon;
- uint16_t token;
- rte_atomic16_t in_use;
- uint32_t dpcon_id;
- uint16_t qbman_ch_id;
- uint8_t num_priorities;
- uint8_t channel_index;
-};
-
struct dpaa2_eventq {
/* DPcon device */
struct dpaa2_dpcon_dev *dpcon;
@@ -2006,7 +2006,7 @@ dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
int eth_rx_queue_id,
- uint16_t dpcon_id,
+ struct dpaa2_dpcon_dev *dpcon,
const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
{
struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
@@ -2014,7 +2014,7 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
uint8_t flow_id = dpaa2_ethq->flow_id;
struct dpni_queue cfg;
- uint8_t options;
+ uint8_t options, priority;
int ret;
if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
@@ -2026,11 +2026,14 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
else
return -EINVAL;
+ priority = (RTE_EVENT_DEV_PRIORITY_LOWEST / queue_conf->ev.priority) *
+ (dpcon->num_priorities - 1);
+
memset(&cfg, 0, sizeof(struct dpni_queue));
options = DPNI_QUEUE_OPT_DEST;
cfg.destination.type = DPNI_DEST_DPCON;
- cfg.destination.id = dpcon_id;
- cfg.destination.priority = queue_conf->ev.priority;
+ cfg.destination.id = dpcon->dpcon_id;
+ cfg.destination.priority = priority;
if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
@@ -164,7 +164,7 @@ int dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv, void *blist);
int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
int eth_rx_queue_id,
- uint16_t dpcon_id,
+ struct dpaa2_dpcon_dev *dpcon,
const struct rte_event_eth_rx_adapter_queue_conf *queue_conf);
int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,