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GET /api/patches/99389/?format=api
{ "id": 99389, "url": "http://patches.dpdk.org/api/patches/99389/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1632291108-28780-3-git-send-email-skoteshwar@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1632291108-28780-3-git-send-email-skoteshwar@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1632291108-28780-3-git-send-email-skoteshwar@marvell.com", "date": "2021-09-22T06:11:42", "name": "[v3,2/8] common/cnxk: support SMQ flush", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "faa8a0fd22c73fc6a26d2f01f439f53da644ef13", "submitter": { "id": 2009, "url": "http://patches.dpdk.org/api/people/2009/?format=api", "name": "Satha Koteswara Rao Kottidi", "email": "skoteshwar@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1632291108-28780-3-git-send-email-skoteshwar@marvell.com/mbox/", "series": [ { "id": 19067, "url": "http://patches.dpdk.org/api/series/19067/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19067", "date": "2021-09-22T06:11:40", "name": "Add TM Support for CN9K and CN10K", "version": 3, "mbox": "http://patches.dpdk.org/series/19067/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/99389/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/99389/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 023BEA0C45;\n\tWed, 22 Sep 2021 08:12:30 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 73D984119D;\n\tWed, 22 Sep 2021 08:12:24 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id C4BCA4119C\n for <dev@dpdk.org>; Wed, 22 Sep 2021 08:12:18 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 18LLFxaq023412;\n Tue, 21 Sep 2021 23:12:15 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3b7q5d9ep5-19\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 21 Sep 2021 23:12:15 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 21 Sep 2021 23:12:03 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 21 Sep 2021 23:12:03 -0700", "from cavium.marvell.com (cavium.marvell.com [10.28.34.244])\n by maili.marvell.com (Postfix) with ESMTP id AA43E3F7079;\n Tue, 21 Sep 2021 23:12:01 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=qQYgStywZ7DqgK1WNia9EMkJ6ePNJmN+6LqAXVN6a2A=;\n b=jW8v320NYbdfWfIj4jRe/CR6XQ+5o/aN3TbvLlyjTlMFdOd47qifoOr265SvjY8TASGn\n 6tx9b/XexzajmKL+GCW2OZ21h6mePrywCxgCFavPY38qqnv4TH3/zLpXwUH38ocrPMal\n gGLDA4CkJ1GfyVZQ5iQLMiBzrNZ/Cv3+9eJabxe+A4YcUfghok39vb2bSkZAindRrUSn\n b/0URLg7Wkqfda8rHgmequNkN/+bHaY07tRpKstV1zcqBm0z2gbO3A/MjQTcaeWRmjRX\n msRjE/pY5nAyRO2sxSDcHcuUDJvHE+DlztLnx1+21I5mjbS+ZVMpFPwYVr/n4ZWiD7xY vw==", "From": "<skoteshwar@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>", "Date": "Wed, 22 Sep 2021 02:11:42 -0400", "Message-ID": "<1632291108-28780-3-git-send-email-skoteshwar@marvell.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1632291108-28780-1-git-send-email-skoteshwar@marvell.com>", "References": "<1630516236-10526-1-git-send-email-skoteshwar@marvell.com>\n <1632291108-28780-1-git-send-email-skoteshwar@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "eVFu2Gf9nYQ6KPDCFvJPAZFisE6KFDC9", "X-Proofpoint-ORIG-GUID": "eVFu2Gf9nYQ6KPDCFvJPAZFisE6KFDC9", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-22_02,2021-09-20_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH v3 2/8] common/cnxk: support SMQ flush", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nEach NIX interface had one or more SMQs connected to SQs to send\npackets. When flush enabled on SMQ, hardware will push all packets\nfrom SMQ to physical link. This API will enable flush on all SMQs\nof an interface.\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\nAcked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/hw/nix.h | 6 ++++\n drivers/common/cnxk/roc_nix.h | 1 +\n drivers/common/cnxk/roc_nix_tm_ops.c | 50 ++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 1 +\n 4 files changed, 58 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h\nindex a0ffd25660..bc908c25b1 100644\n--- a/drivers/common/cnxk/hw/nix.h\n+++ b/drivers/common/cnxk/hw/nix.h\n@@ -2189,4 +2189,10 @@ struct nix_lso_format {\n #define NIX_LSO_FORMAT_IDX_TSOV4 0\n #define NIX_LSO_FORMAT_IDX_TSOV6 1\n \n+/* [CN10K, .) */\n+#define NIX_SENDSTATALG_MASK\t 0x7\n+#define NIX_SENDSTATALG_SEL_MASK 0x8\n+#define NIX_SENDSTAT_IOFFSET_MASK 0xFFF\n+#define NIX_SENDSTAT_OOFFSET_MASK 0xFFF\n+\n #endif /* __NIX_HW_H__ */\ndiff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex b0e6fabe31..ac7bd7e3ec 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -468,6 +468,7 @@ int __roc_api roc_nix_tm_rsrc_count(struct roc_nix *roc_nix,\n int __roc_api roc_nix_tm_node_name_get(struct roc_nix *roc_nix,\n \t\t\t\t uint32_t node_id, char *buf,\n \t\t\t\t size_t buflen);\n+int __roc_api roc_nix_smq_flush(struct roc_nix *roc_nix);\n \n /* MAC */\n int __roc_api roc_nix_mac_rxtx_start_stop(struct roc_nix *roc_nix, bool start);\ndiff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c\nindex f2173c9a58..02ee08bc4c 100644\n--- a/drivers/common/cnxk/roc_nix_tm_ops.c\n+++ b/drivers/common/cnxk/roc_nix_tm_ops.c\n@@ -317,6 +317,56 @@ roc_nix_tm_node_delete(struct roc_nix *roc_nix, uint32_t node_id, bool free)\n \treturn nix_tm_node_delete(roc_nix, node_id, ROC_NIX_TM_USER, free);\n }\n \n+int\n+roc_nix_smq_flush(struct roc_nix *roc_nix)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\tstruct nix_tm_node_list *list;\n+\tenum roc_nix_tm_tree tree;\n+\tstruct nix_tm_node *node;\n+\tint rc = 0;\n+\n+\tif (!(nix->tm_flags & NIX_TM_HIERARCHY_ENA))\n+\t\treturn 0;\n+\n+\ttree = nix->tm_tree;\n+\tlist = nix_tm_node_list(nix, tree);\n+\n+\t/* XOFF & Flush all SMQ's. HRM mandates\n+\t * all SQ's empty before SMQ flush is issued.\n+\t */\n+\tTAILQ_FOREACH(node, list, node) {\n+\t\tif (node->hw_lvl != NIX_TXSCH_LVL_SMQ)\n+\t\t\tcontinue;\n+\t\tif (!(node->flags & NIX_TM_NODE_HWRES))\n+\t\t\tcontinue;\n+\n+\t\trc = nix_tm_smq_xoff(nix, node, true);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to enable smq %u, rc=%d\", node->hw_id,\n+\t\t\t\trc);\n+\t\t\tgoto exit;\n+\t\t}\n+\t}\n+\n+\t/* XON all SMQ's */\n+\tTAILQ_FOREACH(node, list, node) {\n+\t\tif (node->hw_lvl != NIX_TXSCH_LVL_SMQ)\n+\t\t\tcontinue;\n+\t\tif (!(node->flags & NIX_TM_NODE_HWRES))\n+\t\t\tcontinue;\n+\n+\t\trc = nix_tm_smq_xoff(nix, node, false);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to enable smq %u, rc=%d\", node->hw_id,\n+\t\t\t\trc);\n+\t\t\tgoto exit;\n+\t\t}\n+\t}\n+exit:\n+\treturn rc;\n+}\n+\n int\n roc_nix_tm_hierarchy_disable(struct roc_nix *roc_nix)\n {\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 5df2e56ce6..388f9385e0 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -170,6 +170,7 @@ INTERNAL {\n \troc_nix_xstats_names_get;\n \troc_nix_switch_hdr_set;\n \troc_nix_eeprom_info_get;\n+\troc_nix_smq_flush;\n \troc_nix_tm_dump;\n \troc_nix_tm_fini;\n \troc_nix_tm_free_resources;\n", "prefixes": [ "v3", "2/8" ] }