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GET /api/patches/99388/?format=api
{ "id": 99388, "url": "http://patches.dpdk.org/api/patches/99388/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1632291108-28780-5-git-send-email-skoteshwar@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1632291108-28780-5-git-send-email-skoteshwar@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1632291108-28780-5-git-send-email-skoteshwar@marvell.com", "date": "2021-09-22T06:11:44", "name": "[v3,4/8] common/cnxk: handle packet mode shaper limits", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "04e52f28a2cb5fb30a266f09b6e4fac9d6b0c6ca", "submitter": { "id": 2009, "url": "http://patches.dpdk.org/api/people/2009/?format=api", "name": "Satha Koteswara Rao Kottidi", "email": "skoteshwar@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1632291108-28780-5-git-send-email-skoteshwar@marvell.com/mbox/", "series": [ { "id": 19067, "url": "http://patches.dpdk.org/api/series/19067/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19067", "date": "2021-09-22T06:11:40", "name": "Add TM Support for CN9K and CN10K", "version": 3, "mbox": "http://patches.dpdk.org/series/19067/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/99388/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/99388/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3E506A0C45;\n\tWed, 22 Sep 2021 08:12:24 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1F5F441191;\n\tWed, 22 Sep 2021 08:12:23 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id D0C8E4118A\n for <dev@dpdk.org>; Wed, 22 Sep 2021 08:12:16 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 18LLFxar023412\n for <dev@dpdk.org>; Tue, 21 Sep 2021 23:12:16 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3b7q5d9ep5-20\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 21 Sep 2021 23:12:15 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 21 Sep 2021 23:12:08 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 21 Sep 2021 23:12:08 -0700", "from cavium.marvell.com (cavium.marvell.com [10.28.34.244])\n by maili.marvell.com (Postfix) with ESMTP id 9B8763F7076;\n Tue, 21 Sep 2021 23:12:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=wQJN8gXSaztMHSeIURUdujzujrPFNKdoJfHHLeomkNI=;\n b=gBfuvimP920lcIUPPWWs6oZOchWBQ0mkwG3O4V+gyIWqiFtD6dQyLz9uHgo8IRz1kPxw\n 7z84XD6Cx48Y6Q/HGu/xtDZsKKR1pfvQJdwoNrRx9/kGf078Qz/+wIq5o0dZbgvi1WYB\n yv79p7r8z/PX4kLfNtDQ0IMeymFVqxy5fn1IRd0v6dJBrMr0W/nymRJ18a0sRtwCj1tx\n xk+IV57WghjP2oZHlfbLLOvrfKFoOH3ois2GXmFCDsup7brVnS+MKpBPZn0knzvtlvUE\n jJGDkGDyg+sXYauDyLq/6UGzUzrbbZr01u3ExsvgHbm6/U1PPKnd8+y2QTyS0TnSwaNf Tw==", "From": "<skoteshwar@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Wed, 22 Sep 2021 02:11:44 -0400", "Message-ID": "<1632291108-28780-5-git-send-email-skoteshwar@marvell.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1632291108-28780-1-git-send-email-skoteshwar@marvell.com>", "References": "<1630516236-10526-1-git-send-email-skoteshwar@marvell.com>\n <1632291108-28780-1-git-send-email-skoteshwar@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "H5GqcKaZ4lmZ4CZT1l1dT9iXei1zbWCB", "X-Proofpoint-ORIG-GUID": "H5GqcKaZ4lmZ4CZT1l1dT9iXei1zbWCB", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-22_02,2021-09-20_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH v3 4/8] common/cnxk: handle packet mode shaper\n limits", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nAdd new macros to reflect HW shaper PPS limits. New API to validate\ninput rates for packet mode. Increase adjust value to support lesser\nPPS (<61).\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\nAcked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/hw/nix.h | 3 +\n drivers/common/cnxk/roc_nix_priv.h | 1 +\n drivers/common/cnxk/roc_nix_tm_ops.c | 76 ++++++++++++++++++--------\n drivers/common/cnxk/roc_nix_tm_utils.c | 4 +-\n 4 files changed, 60 insertions(+), 24 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/hw/nix.h b/drivers/common/cnxk/hw/nix.h\nindex d2054385c2..6a0eb019ac 100644\n--- a/drivers/common/cnxk/hw/nix.h\n+++ b/drivers/common/cnxk/hw/nix.h\n@@ -2133,6 +2133,9 @@ struct nix_lso_format {\n \tNIX_TM_SHAPER_RATE(NIX_TM_MAX_RATE_EXPONENT, NIX_TM_MAX_RATE_MANTISSA, \\\n \t\t\t 0)\n \n+#define NIX_TM_MIN_SHAPER_PPS_RATE 25\n+#define NIX_TM_MAX_SHAPER_PPS_RATE (100ul << 20)\n+\n /* NIX burst limits */\n #define NIX_TM_MAX_BURST_EXPONENT 0xful\n #define NIX_TM_MAX_BURST_MANTISSA 0x7ffful\ndiff --git a/drivers/common/cnxk/roc_nix_priv.h b/drivers/common/cnxk/roc_nix_priv.h\nindex cc8e822427..3412bf25e5 100644\n--- a/drivers/common/cnxk/roc_nix_priv.h\n+++ b/drivers/common/cnxk/roc_nix_priv.h\n@@ -90,6 +90,7 @@ struct nix_tm_shaper_profile {\n \tstruct nix_tm_tb commit;\n \tstruct nix_tm_tb peak;\n \tint32_t pkt_len_adj;\n+\tint32_t pkt_mode_adj;\n \tbool pkt_mode;\n \tuint32_t id;\n \tvoid (*free_fn)(void *profile);\ndiff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c\nindex 24a5a911aa..f956f8d8ed 100644\n--- a/drivers/common/cnxk/roc_nix_tm_ops.c\n+++ b/drivers/common/cnxk/roc_nix_tm_ops.c\n@@ -84,6 +84,51 @@ roc_nix_tm_free_resources(struct roc_nix *roc_nix, bool hw_only)\n \treturn nix_tm_free_resources(roc_nix, BIT(ROC_NIX_TM_USER), hw_only);\n }\n \n+static int\n+nix_tm_adjust_shaper_pps_rate(struct nix_tm_shaper_profile *profile)\n+{\n+\tuint64_t min_rate = profile->commit.rate;\n+\n+\tif (!profile->pkt_mode)\n+\t\treturn 0;\n+\n+\tprofile->pkt_mode_adj = 1;\n+\n+\tif (profile->commit.rate &&\n+\t (profile->commit.rate < NIX_TM_MIN_SHAPER_PPS_RATE ||\n+\t profile->commit.rate > NIX_TM_MAX_SHAPER_PPS_RATE))\n+\t\treturn NIX_ERR_TM_INVALID_COMMIT_RATE;\n+\n+\tif (profile->peak.rate &&\n+\t (profile->peak.rate < NIX_TM_MIN_SHAPER_PPS_RATE ||\n+\t profile->peak.rate > NIX_TM_MAX_SHAPER_PPS_RATE))\n+\t\treturn NIX_ERR_TM_INVALID_PEAK_RATE;\n+\n+\tif (profile->peak.rate && min_rate > profile->peak.rate)\n+\t\tmin_rate = profile->peak.rate;\n+\n+\t/* Each packet accomulate single count, whereas HW\n+\t * considers each unit as Byte, so we need convert\n+\t * user pps to bps\n+\t */\n+\tprofile->commit.rate = profile->commit.rate * 8;\n+\tprofile->peak.rate = profile->peak.rate * 8;\n+\tmin_rate = min_rate * 8;\n+\n+\tif (min_rate && (min_rate < NIX_TM_MIN_SHAPER_RATE)) {\n+\t\tint adjust = NIX_TM_MIN_SHAPER_RATE / min_rate;\n+\n+\t\tif (adjust > NIX_TM_LENGTH_ADJUST_MAX)\n+\t\t\treturn NIX_ERR_TM_SHAPER_PKT_LEN_ADJUST;\n+\n+\t\tprofile->pkt_mode_adj += adjust;\n+\t\tprofile->commit.rate += (adjust * profile->commit.rate);\n+\t\tprofile->peak.rate += (adjust * profile->peak.rate);\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int\n nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \t\t\t struct nix_tm_shaper_profile *profile, int skip_ins)\n@@ -93,8 +138,13 @@ nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \tuint64_t min_burst, max_burst;\n \tuint64_t peak_rate, peak_sz;\n \tuint32_t id;\n+\tint rc;\n \n \tid = profile->id;\n+\trc = nix_tm_adjust_shaper_pps_rate(profile);\n+\tif (rc)\n+\t\treturn rc;\n+\n \tcommit_rate = profile->commit.rate;\n \tcommit_sz = profile->commit.size;\n \tpeak_rate = profile->peak.rate;\n@@ -164,17 +214,8 @@ roc_nix_tm_shaper_profile_add(struct roc_nix *roc_nix,\n \n \tprofile->ref_cnt = 0;\n \tprofile->id = roc_profile->id;\n-\tif (roc_profile->pkt_mode) {\n-\t\t/* Each packet accomulate single count, whereas HW\n-\t\t * considers each unit as Byte, so we need convert\n-\t\t * user pps to bps\n-\t\t */\n-\t\tprofile->commit.rate = roc_profile->commit_rate * 8;\n-\t\tprofile->peak.rate = roc_profile->peak_rate * 8;\n-\t} else {\n-\t\tprofile->commit.rate = roc_profile->commit_rate;\n-\t\tprofile->peak.rate = roc_profile->peak_rate;\n-\t}\n+\tprofile->commit.rate = roc_profile->commit_rate;\n+\tprofile->peak.rate = roc_profile->peak_rate;\n \tprofile->commit.size = roc_profile->commit_sz;\n \tprofile->peak.size = roc_profile->peak_sz;\n \tprofile->pkt_len_adj = roc_profile->pkt_len_adj;\n@@ -192,17 +233,8 @@ roc_nix_tm_shaper_profile_update(struct roc_nix *roc_nix,\n \n \tprofile = (struct nix_tm_shaper_profile *)roc_profile->reserved;\n \n-\tif (roc_profile->pkt_mode) {\n-\t\t/* Each packet accomulate single count, whereas HW\n-\t\t * considers each unit as Byte, so we need convert\n-\t\t * user pps to bps\n-\t\t */\n-\t\tprofile->commit.rate = roc_profile->commit_rate * 8;\n-\t\tprofile->peak.rate = roc_profile->peak_rate * 8;\n-\t} else {\n-\t\tprofile->commit.rate = roc_profile->commit_rate;\n-\t\tprofile->peak.rate = roc_profile->peak_rate;\n-\t}\n+\tprofile->commit.rate = roc_profile->commit_rate;\n+\tprofile->peak.rate = roc_profile->peak_rate;\n \tprofile->commit.size = roc_profile->commit_sz;\n \tprofile->peak.size = roc_profile->peak_sz;\n \ndiff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c\nindex 00604b10d3..83306248e8 100644\n--- a/drivers/common/cnxk/roc_nix_tm_utils.c\n+++ b/drivers/common/cnxk/roc_nix_tm_utils.c\n@@ -628,8 +628,8 @@ nix_tm_shaper_reg_prep(struct nix_tm_node *node,\n \tmemset(&pir, 0, sizeof(pir));\n \tnix_tm_shaper_conf_get(profile, &cir, &pir);\n \n-\tif (node->pkt_mode)\n-\t\tadjust = 1;\n+\tif (profile && node->pkt_mode)\n+\t\tadjust = profile->pkt_mode_adj;\n \telse if (profile)\n \t\tadjust = profile->pkt_len_adj;\n \n", "prefixes": [ "v3", "4/8" ] }