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GET /api/patches/99372/?format=api
{ "id": 99372, "url": "http://patches.dpdk.org/api/patches/99372/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-21-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210921132009.3461020-21-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210921132009.3461020-21-qi.z.zhang@intel.com", "date": "2021-09-21T13:20:09", "name": "[v3,20/20] net/ice/base: add API for parser profile initialization", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "e30e1a92a20d2c7cf61eef9a9cc19c632ba18d98", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210921132009.3461020-21-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 19057, "url": "http://patches.dpdk.org/api/series/19057/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19057", "date": "2021-09-21T13:19:49", "name": "ice/base: add parser module", "version": 3, "mbox": "http://patches.dpdk.org/series/19057/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/99372/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/99372/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 26875A0C4C;\n\tTue, 21 Sep 2021 15:19:26 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EE0B1411AA;\n\tTue, 21 Sep 2021 15:17:39 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id D94B5411A0\n for <dev@dpdk.org>; Tue, 21 Sep 2021 15:17:36 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Sep 2021 06:17:36 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by orsmga008.jf.intel.com with ESMTP; 21 Sep 2021 06:17:35 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10113\"; a=\"202847527\"", "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"202847527\"", "E=Sophos;i=\"5.85,311,1624345200\"; d=\"scan'208\";a=\"484173985\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "junfeng.guo@intel.com,\n\tdev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Date": "Tue, 21 Sep 2021 21:20:09 +0800", "Message-Id": "<20210921132009.3461020-21-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20210921132009.3461020-1-qi.z.zhang@intel.com>", "References": "<20210921132009.3461020-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 20/20] net/ice/base: add API for parser\n profile initialization", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add API ice_parser_profile_init to init a parser profile base on\na parser result and a mask buffer. The ice_parser_profile can feed to\nlow level FXP engine to create HW profile / field vector directly.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\nAcked-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n drivers/net/ice/base/ice_parser.c | 112 ++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_parser.h | 24 +++++++\n 2 files changed, 136 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_parser.c b/drivers/net/ice/base/ice_parser.c\nindex a657e826a3..690004e6e2 100644\n--- a/drivers/net/ice/base/ice_parser.c\n+++ b/drivers/net/ice/base/ice_parser.c\n@@ -442,3 +442,115 @@ enum ice_status ice_parser_ecpri_tunnel_set(struct ice_parser *psr,\n {\n \treturn _tunnel_port_set(psr, \"TNL_UDP_ECPRI\", udp_port, on);\n }\n+\n+static bool _nearest_proto_id(struct ice_parser_result *rslt, u16 offset,\n+\t\t\t u8 *proto_id, u16 *proto_off)\n+{\n+\tu16 dist = 0xffff;\n+\tu8 p = 0;\n+\tint i;\n+\n+\tfor (i = 0; i < rslt->po_num; i++) {\n+\t\tif (offset < rslt->po[i].offset)\n+\t\t\tcontinue;\n+\t\tif (offset - rslt->po[i].offset < dist) {\n+\t\t\tp = rslt->po[i].proto_id;\n+\t\t\tdist = offset - rslt->po[i].offset;\n+\t\t}\n+\t}\n+\n+\tif (dist % 2)\n+\t\treturn false;\n+\n+\t*proto_id = p;\n+\t*proto_off = dist;\n+\n+\treturn true;\n+}\n+\n+/** default flag mask to cover GTP_EH_PDU, GTP_EH_PDU_LINK and TUN2\n+ * In future, the flag masks should learn from DDP\n+ */\n+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW\t0x4002\n+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL\t0x0000\n+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD\t0x6080\n+#define ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS\t0x6010\n+\n+/**\n+ * ice_parser_profile_init - initialize a FXP profile base on parser result\n+ * @rslt: a instance of a parser result\n+ * @pkt_buf: packet data buffer\n+ * @pkt_msk: packet mask buffer\n+ * @pkt_len: packet length\n+ * @blk: FXP pipeline stage\n+ * @prefix_match: match protocol stack exactly or only prefix\n+ * @prof: input/output parameter to save the profile\n+ */\n+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,\n+\t\t\t\t\tconst u8 *pkt_buf, const u8 *msk_buf,\n+\t\t\t\t\tint buf_len, enum ice_block blk,\n+\t\t\t\t\tbool prefix_match,\n+\t\t\t\t\tstruct ice_parser_profile *prof)\n+{\n+\tu8 proto_id = 0xff;\n+\tu16 proto_off = 0;\n+\tu16 off;\n+\n+\tice_memset(prof, 0, sizeof(*prof), ICE_NONDMA_MEM);\n+\tice_set_bit(rslt->ptype, prof->ptypes);\n+\tif (blk == ICE_BLK_SW) {\n+\t\tprof->flags = rslt->flags_sw;\n+\t\tprof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_SW;\n+\t} else if (blk == ICE_BLK_ACL) {\n+\t\tprof->flags = rslt->flags_acl;\n+\t\tprof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_ACL;\n+\t} else if (blk == ICE_BLK_FD) {\n+\t\tprof->flags = rslt->flags_fd;\n+\t\tprof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_FD;\n+\t} else if (blk == ICE_BLK_RSS) {\n+\t\tprof->flags = rslt->flags_rss;\n+\t\tprof->flags_msk = ICE_KEYBUILD_FLAG_MASK_DEFAULT_RSS;\n+\t} else {\n+\t\treturn ICE_ERR_PARAM;\n+\t}\n+\n+\tfor (off = 0; off < buf_len - 1; off++) {\n+\t\tif (msk_buf[off] == 0 && msk_buf[off + 1] == 0)\n+\t\t\tcontinue;\n+\t\tif (!_nearest_proto_id(rslt, off, &proto_id, &proto_off))\n+\t\t\tcontinue;\n+\t\tif (prof->fv_num >= 32)\n+\t\t\treturn ICE_ERR_PARAM;\n+\n+\t\tprof->fv[prof->fv_num].proto_id = proto_id;\n+\t\tprof->fv[prof->fv_num].offset = proto_off;\n+\t\tprof->fv[prof->fv_num].spec = *(const u16 *)&pkt_buf[off];\n+\t\tprof->fv[prof->fv_num].msk = *(const u16 *)&msk_buf[off];\n+\t\tprof->fv_num++;\n+\t}\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n+/**\n+ * ice_parser_profile_dump - dump an FXP profile info\n+ * @hw: pointer to the hardware structure\n+ * @prof: profile info to dump\n+ */\n+void ice_parser_profile_dump(struct ice_hw *hw, struct ice_parser_profile *prof)\n+{\n+\tu16 i;\n+\n+\tice_info(hw, \"ptypes:\\n\");\n+\tfor (i = 0; i < ICE_FLOW_PTYPE_MAX; i++)\n+\t\tif (ice_is_bit_set(prof->ptypes, i))\n+\t\t\tice_info(hw, \"\\t%d\\n\", i);\n+\n+\tfor (i = 0; i < prof->fv_num; i++)\n+\t\tice_info(hw, \"proto = %d, offset = %d spec = 0x%04x, mask = 0x%04x\\n\",\n+\t\t\t prof->fv[i].proto_id, prof->fv[i].offset,\n+\t\t\t prof->fv[i].spec, prof->fv[i].msk);\n+\n+\tice_info(hw, \"flags = 0x%04x\\n\", prof->flags);\n+\tice_info(hw, \"flags_msk = 0x%04x\\n\", prof->flags_msk);\n+}\ndiff --git a/drivers/net/ice/base/ice_parser.h b/drivers/net/ice/base/ice_parser.h\nindex 105d908ebe..816aea782a 100644\n--- a/drivers/net/ice/base/ice_parser.h\n+++ b/drivers/net/ice/base/ice_parser.h\n@@ -86,4 +86,28 @@ struct ice_parser_result {\n enum ice_status ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,\n \t\t\t int pkt_len, struct ice_parser_result *rslt);\n void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);\n+\n+struct ice_parser_fv {\n+\tu8 proto_id; /* hardware protocol ID */\n+\tu16 offset; /* offset from the start of the protocol header */\n+\tu16 spec; /* 16 bits pattern to match */\n+\tu16 msk; /* 16 bits pattern mask */\n+};\n+\n+struct ice_parser_profile {\n+\tstruct ice_parser_fv fv[48]; /* field vector array */\n+\tint fv_num; /* field vector number must <= 48 */\n+\tu16 flags; /* 16 bits key builder flag */\n+\tu16 flags_msk; /* key builder flag masker */\n+\t/* 1024 bits PTYPE bitmap */\n+\tice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX);\n+};\n+\n+enum ice_status ice_parser_profile_init(struct ice_parser_result *rslt,\n+\t\t\t\t\tconst u8 *pkt_buf, const u8 *msk_buf,\n+\t\t\t\t\tint buf_len, enum ice_block blk,\n+\t\t\t\t\tbool prefix_match,\n+\t\t\t\t\tstruct ice_parser_profile *prof);\n+void ice_parser_profile_dump(struct ice_hw *hw,\n+\t\t\t struct ice_parser_profile *prof);\n #endif /* _ICE_PARSER_H_ */\n", "prefixes": [ "v3", "20/20" ] }