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GET /api/patches/98829/?format=api
{ "id": 98829, "url": "http://patches.dpdk.org/api/patches/98829/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210914053833.7760-6-talshn@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210914053833.7760-6-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210914053833.7760-6-talshn@nvidia.com", "date": "2021-09-14T05:38:28", "name": "[RFC,05/10] crypto/mlx5: replace UNIX functions with EAL functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d42dff85cfa63a72ef404bcf5c224275b2aeb52a", "submitter": { "id": 1893, "url": "http://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210914053833.7760-6-talshn@nvidia.com/mbox/", "series": [ { "id": 18890, "url": "http://patches.dpdk.org/api/series/18890/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18890", "date": "2021-09-14T05:38:23", "name": "Support MLX5 crypto driver on Windows", "version": 1, "mbox": "http://patches.dpdk.org/series/18890/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/98829/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/98829/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A47F1A0C47;\n\tTue, 14 Sep 2021 07:40:32 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7F5084111C;\n\tTue, 14 Sep 2021 07:40:09 +0200 (CEST)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2075.outbound.protection.outlook.com [40.107.236.75])\n by mails.dpdk.org (Postfix) with ESMTP id B5E254111C\n for <dev@dpdk.org>; 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mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=jMY05z5nbj7LUGKNuavITTWdKPPYxbMWRUO6ZUayrtw=;\n b=Og1IydhfdbsbQhFkMonEV7tFML/Teo1QbYBoNQddPulG+Y3fSD/9eknm9f9Pw1ODYgLsDEMc9kbZX3Fnzd5FguHWVWsQWzTEk3JxDah2cdBuPQhZ18xIbF294+meNCRcAVRLDtS4C/LEAb6/nKkg+s13qFO8adlnmaAK9VngoUYcdLm1tMjDTzCGY/j/VorPUacY8P4s/vTDtKJVEC9ZFTfauAeEJWgKvtvLujfO4DjFcwacuJpfPXkFGROZo3lb1qwV3ukXKztTjY2Raaw4IjfG/K70MGtysMf6Mv5PcsK2n3hstBZAHeX+CzXaQjTLOky1i4I55VgRw8Rzswh4nw==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)\n header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<thomas@monjalon.net>, <matan@nvidia.com>, <rasland@nvidia.com>,\n <asafp@nvidia.com>, <gakhil@marvell.com>, <declan.doherty@intel.com>,\n <viacheslavo@nvidia.com>, <eilong@nvidia.com>", "Date": "Tue, 14 Sep 2021 08:38:28 +0300", "Message-ID": "<20210914053833.7760-6-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20210914053833.7760-1-talshn@nvidia.com>", "References": "<20210914053833.7760-1-talshn@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n DRHQMAIL107.nvidia.com (10.27.9.16)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "bd1f6933-e2eb-42d7-101e-08d977421b49", "X-MS-TrafficTypeDiagnostic": "PH0PR12MB5402:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <PH0PR12MB5402A5AE78C6A2B7A783D4E7A4DA9@PH0PR12MB5402.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:5797;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n VZo4hX5mlXBPdHbhtz/JpEnoB3ZIwyTF6592UXrnnscv7cQuj6EogVZczX52RfoC/2DkOF0uVoGqlbSDa07amyCfxh1zqIzpaFvw7/o3thm5YQDLADuG2spUSkq+CQzhBWAIBVILSlMR0QUgBUh/21PEP9ZbEBb3M58yf6tzw89tLc5Yp3603kWG0iA8Jk6tiXsWc4sM9HbLzFfPxAhA78sxcCodcALK2zSMrXysRQNv8nhBgUNV+3HjnIjH8VGusYATDQNMBiBeK4Yj6JPIvetar0FqKiWFAIYGvpVHxVvO4dZgppz9wpJgC+qAeWxJAZ7g54AJjdfsN27Zo65YFPQz5XpBSnYL/uFSCKUMZHhTGMJaaPjVmX6ISCYWEaQTHb2DXkFUF/zleFlHZHoKz7przo376O73dyYs/IalCZtXcv+WI43i4RJuCDiSAidEFi3QnViNU3gkJhgTHNjXer6H2uFWyEdXQeu0uMN0Kub4SVOFroxF3w28+CcgJVus7p+3v0jP86ei6Si0iV8LKfsJsl55eqv0j9UqSkm0stqQWn1JX4GIowPDk9nIKFoWUMWvVVimZDqbpFxwVYXEEt7xkCo68Lfo+Al10TNEOSfIffsZ0LEQiCicFJ6JqX+q0wQomVDUXcnkGXZvcOhq8Xmcd5Q00atuY/7ReAb47ECCW0gISUG5Sizuwvu5mM5j+fyDhm1upOC99zXNEDoH+Q==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(36860700001)(6916009)(86362001)(54906003)(47076005)(508600001)(2616005)(107886003)(83380400001)(70206006)(5660300002)(1076003)(336012)(70586007)(26005)(186003)(16526019)(426003)(7696005)(55016002)(8676002)(6286002)(316002)(36756003)(36906005)(8936002)(82310400003)(7636003)(6666004)(2906002)(356005)(4326008);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Sep 2021 05:40:05.7796 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n bd1f6933-e2eb-42d7-101e-08d977421b49", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT056.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH0PR12MB5402", "Subject": "[dpdk-dev] [RFC PATCH 05/10] crypto/mlx5: replace UNIX functions\n with EAL functions", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Use the OS agnostic EAL function rte_mem_page_size to get\npage size value instead of the Linux specific implementation.\n\nAlso remove the usage of PTHREAD_MUTEX_INITIALIZER which is not\nsupport in Windows and initialize priv_list_lock in RTE_INIT.\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\n---\n drivers/crypto/mlx5/mlx5_crypto.c | 6 ++++--\n 1 file changed, 4 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex b3d5200ca3..3dac69f860 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -4,6 +4,7 @@\n \n #include <rte_malloc.h>\n #include <rte_mempool.h>\n+#include <rte_eal_paging.h>\n #include <rte_errno.h>\n #include <rte_log.h>\n #include <rte_bus_pci.h>\n@@ -33,7 +34,7 @@\n \n TAILQ_HEAD(mlx5_crypto_privs, mlx5_crypto_priv) mlx5_crypto_priv_list =\n \t\t\t\tTAILQ_HEAD_INITIALIZER(mlx5_crypto_priv_list);\n-static pthread_mutex_t priv_list_lock = PTHREAD_MUTEX_INITIALIZER;\n+static pthread_mutex_t priv_list_lock;\n \n int mlx5_crypto_logtype;\n \n@@ -700,7 +701,7 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \tattr.pd = priv->pdn;\n \tattr.uar_index = mlx5_os_get_devx_uar_page_id(priv->uar);\n \tattr.cqn = qp->cq_obj.cq->id;\n-\tattr.log_page_size = rte_log2_u32(sysconf(_SC_PAGESIZE));\n+\tattr.log_page_size = rte_log2_u32(rte_mem_page_size());\n \tattr.rq_size = 0;\n \tattr.sq_size = RTE_BIT32(log_nb_desc);\n \tattr.dbr_umem_valid = 1;\n@@ -1134,6 +1135,7 @@ static struct mlx5_class_driver mlx5_crypto_driver = {\n \n RTE_INIT(rte_mlx5_crypto_init)\n {\n+\tpthread_mutex_init(&priv_list_lock, NULL);\n \tmlx5_common_init();\n \tif (mlx5_glue != NULL)\n \t\tmlx5_class_driver_register(&mlx5_crypto_driver);\n", "prefixes": [ "RFC", "05/10" ] }