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GET /api/patches/98050/?format=api
{ "id": 98050, "url": "http://patches.dpdk.org/api/patches/98050/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210906075450.1452123-13-skori@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210906075450.1452123-13-skori@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210906075450.1452123-13-skori@marvell.com", "date": "2021-09-06T07:54:36", "name": "[13/27] common/cnxk: support RoC API to reset profile stats", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d35e3da12e6d928de2318aa74f8dd2bcdee03d04", "submitter": { "id": 1318, "url": "http://patches.dpdk.org/api/people/1318/?format=api", "name": "Sunil Kumar Kori", "email": "skori@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210906075450.1452123-13-skori@marvell.com/mbox/", "series": [ { "id": 18696, "url": "http://patches.dpdk.org/api/series/18696/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18696", "date": "2021-09-06T07:54:24", "name": "[01/27] common/cnxk: update policer MBOX APIs and HW definitions", "version": 1, "mbox": "http://patches.dpdk.org/series/18696/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/98050/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/98050/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CFA2A0C4D;\n\tMon, 6 Sep 2021 09:56:13 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 75F93410E6;\n\tMon, 6 Sep 2021 09:55:31 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id F194B4115A\n for <dev@dpdk.org>; Mon, 6 Sep 2021 09:55:29 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id\n 1861UxZm022984;\n Mon, 6 Sep 2021 00:55:27 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com with ESMTP id 3aw9d2s55e-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 06 Sep 2021 00:55:27 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 6 Sep 2021 00:55:25 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 6 Sep 2021 00:55:25 -0700", "from localhost.localdomain (unknown [10.28.34.25])\n by maili.marvell.com (Postfix) with ESMTP id 32D783F7089;\n Mon, 6 Sep 2021 00:55:23 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=zB/kTxWlpNcjY3YxVvs6iYSt5lLDWlhiQ8XkkDdWxi8=;\n b=jf7CAnRa7C9aHVGwzxGGnJf62JaW8HGrxrateAW3wcF1KkeTrV6v1AT+Ct7Ulgdzy8v8\n f4ADkugxQ/V/iE4phZ66thB9mdL+rQ7W9u4ORktQEmN42z6JZqPvvXt5OVIB2ziKG704\n oQGj28t0eeuWQlAho4MYeRqunbo7LkSwsJly87DviVjlceQ500Jg597/NAl5vmWO27i/\n oLfcajgb6jcKdzk5aArJH+ee7UZzgnIFRvMxEzgvTsFepQD4STxiXrDNvG/edCKin9AB\n bPlDqcSmPPObQNJgFGVtoqKPQfJ9MprTBpX3daY8jF1ImA3Sbthur60T/wU48z0IjLPt Aw==", "From": "<skori@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>", "Date": "Mon, 6 Sep 2021 13:24:36 +0530", "Message-ID": "<20210906075450.1452123-13-skori@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20210906075450.1452123-1-skori@marvell.com>", "References": "<20210906075450.1452123-1-skori@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "GScBqskRi1pApg6A-LjYx8RpoFMi6VVn", "X-Proofpoint-ORIG-GUID": "GScBqskRi1pApg6A-LjYx8RpoFMi6VVn", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475\n definitions=2021-09-06_02,2021-09-03_01,2020-04-07_01", "Subject": "[dpdk-dev] [PATCH 13/27] common/cnxk: support RoC API to reset\n profile stats", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nImplement RoC API to reset stats per bandwidth profile\nor per nixlf.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n drivers/common/cnxk/roc_nix.h | 7 ++\n drivers/common/cnxk/roc_nix_bpf.c | 113 ++++++++++++++++++++++++++++++\n drivers/common/cnxk/version.map | 2 +\n 3 files changed, 122 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_nix.h b/drivers/common/cnxk/roc_nix.h\nindex 94f9bc5442..03228bc5ea 100644\n--- a/drivers/common/cnxk/roc_nix.h\n+++ b/drivers/common/cnxk/roc_nix.h\n@@ -657,10 +657,17 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,\n \t\t enum roc_nix_bpf_level_flag lvl_flag,\n \t\t uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);\n \n+int __roc_api roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id,\n+\t\t\t\t uint64_t mask,\n+\t\t\t\t enum roc_nix_bpf_level_flag lvl_flag);\n+\n int __roc_api\n roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,\n \t\t\t uint64_t stats[ROC_NIX_BPF_STATS_MAX] /* Out */);\n \n+int __roc_api roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix,\n+\t\t\t\t\t uint64_t mask);\n+\n uint8_t __roc_api\n roc_nix_bpf_level_to_idx(enum roc_nix_bpf_level_flag lvl_flag);\n \ndiff --git a/drivers/common/cnxk/roc_nix_bpf.c b/drivers/common/cnxk/roc_nix_bpf.c\nindex c4a7a14dbe..31fa42316b 100644\n--- a/drivers/common/cnxk/roc_nix_bpf.c\n+++ b/drivers/common/cnxk/roc_nix_bpf.c\n@@ -913,6 +913,86 @@ roc_nix_bpf_stats_read(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,\n \treturn 0;\n }\n \n+int\n+roc_nix_bpf_stats_reset(struct roc_nix *roc_nix, uint16_t id, uint64_t mask,\n+\t\t\tenum roc_nix_bpf_level_flag lvl_flag)\n+{\n+\tstruct mbox *mbox = get_mbox(roc_nix);\n+\tstruct nix_cn10k_aq_enq_req *aq;\n+\tuint8_t level_idx;\n+\n+\tif (roc_model_is_cn9k())\n+\t\treturn NIX_ERR_HW_NOTSUP;\n+\n+\tlevel_idx = roc_nix_bpf_level_to_idx(lvl_flag);\n+\tif (level_idx == ROC_NIX_BPF_LEVEL_IDX_INVALID)\n+\t\treturn NIX_ERR_PARAM;\n+\n+\taq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);\n+\tif (aq == NULL)\n+\t\treturn -ENOSPC;\n+\taq->qidx = (sw_to_hw_lvl_map[level_idx] << 14 | id);\n+\taq->ctype = NIX_AQ_CTYPE_BAND_PROF;\n+\taq->op = NIX_AQ_INSTOP_WRITE;\n+\n+\tif (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS) {\n+\t\taq->prof.green_pkt_pass = 0;\n+\t\taq->prof_mask.green_pkt_pass = ~(aq->prof_mask.green_pkt_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS) {\n+\t\taq->prof.green_octs_pass = 0;\n+\t\taq->prof_mask.green_octs_pass =\n+\t\t\t~(aq->prof_mask.green_octs_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP) {\n+\t\taq->prof.green_pkt_drop = 0;\n+\t\taq->prof_mask.green_pkt_drop = ~(aq->prof_mask.green_pkt_drop);\n+\t}\n+\tif (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP) {\n+\t\taq->prof.green_octs_drop = 0;\n+\t\taq->prof_mask.green_octs_drop =\n+\t\t\t~(aq->prof_mask.green_octs_drop);\n+\t}\n+\tif (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS) {\n+\t\taq->prof.yellow_pkt_pass = 0;\n+\t\taq->prof_mask.yellow_pkt_pass =\n+\t\t\t~(aq->prof_mask.yellow_pkt_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS) {\n+\t\taq->prof.yellow_octs_pass = 0;\n+\t\taq->prof_mask.yellow_octs_pass =\n+\t\t\t~(aq->prof_mask.yellow_octs_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP) {\n+\t\taq->prof.yellow_pkt_drop = 0;\n+\t\taq->prof_mask.yellow_pkt_drop =\n+\t\t\t~(aq->prof_mask.yellow_pkt_drop);\n+\t}\n+\tif (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP) {\n+\t\taq->prof.yellow_octs_drop = 0;\n+\t\taq->prof_mask.yellow_octs_drop =\n+\t\t\t~(aq->prof_mask.yellow_octs_drop);\n+\t}\n+\tif (mask & ROC_NIX_BPF_RED_PKT_F_PASS) {\n+\t\taq->prof.red_pkt_pass = 0;\n+\t\taq->prof_mask.red_pkt_pass = ~(aq->prof_mask.red_pkt_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_RED_OCTS_F_PASS) {\n+\t\taq->prof.red_octs_pass = 0;\n+\t\taq->prof_mask.red_octs_pass = ~(aq->prof_mask.red_octs_pass);\n+\t}\n+\tif (mask & ROC_NIX_BPF_RED_PKT_F_DROP) {\n+\t\taq->prof.red_pkt_drop = 0;\n+\t\taq->prof_mask.red_pkt_drop = ~(aq->prof_mask.red_pkt_drop);\n+\t}\n+\tif (mask & ROC_NIX_BPF_RED_OCTS_F_DROP) {\n+\t\taq->prof.red_octs_drop = 0;\n+\t\taq->prof_mask.red_octs_drop = ~(aq->prof_mask.red_octs_drop);\n+\t}\n+\n+\treturn mbox_process(mbox);\n+}\n+\n int\n roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,\n \t\t\t uint64_t stats[ROC_NIX_BPF_STATS_MAX])\n@@ -1010,3 +1090,36 @@ roc_nix_bpf_lf_stats_read(struct roc_nix *roc_nix, uint64_t mask,\n \n \treturn 0;\n }\n+\n+int\n+roc_nix_bpf_lf_stats_reset(struct roc_nix *roc_nix, uint64_t mask)\n+{\n+\tstruct nix *nix = roc_nix_to_nix_priv(roc_nix);\n+\n+\tif (mask & ROC_NIX_BPF_GREEN_PKT_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_PASS);\n+\tif (mask & ROC_NIX_BPF_GREEN_OCTS_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_PASS);\n+\tif (mask & ROC_NIX_BPF_GREEN_PKT_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_GREEN_PKT_F_DROP);\n+\tif (mask & ROC_NIX_BPF_GREEN_OCTS_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_GREEN_OCTS_F_DROP);\n+\tif (mask & ROC_NIX_BPF_YELLOW_PKT_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_PASS);\n+\tif (mask & ROC_NIX_BPF_YELLOW_OCTS_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_PASS);\n+\tif (mask & ROC_NIX_BPF_YELLOW_PKT_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_YELLOW_PKT_F_DROP);\n+\tif (mask & ROC_NIX_BPF_YELLOW_OCTS_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_YELLOW_OCTS_F_DROP);\n+\tif (mask & ROC_NIX_BPF_RED_PKT_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_PASS);\n+\tif (mask & ROC_NIX_BPF_RED_OCTS_F_PASS)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_PASS);\n+\tif (mask & ROC_NIX_BPF_RED_PKT_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_RED_PKT_F_DROP);\n+\tif (mask & ROC_NIX_BPF_RED_OCTS_F_DROP)\n+\t\tNIX_RST_STATS(ROC_NIX_BPF_RED_OCTS_F_DROP);\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex eb4ff5011b..ab8f917b5c 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -84,8 +84,10 @@ INTERNAL {\n \troc_nix_bpf_free_all;\n \troc_nix_bpf_level_to_idx;\n \troc_nix_bpf_lf_stats_read;\n+\troc_nix_bpf_lf_stats_reset;\n \troc_nix_bpf_pre_color_tbl_setup;\n \troc_nix_bpf_stats_read;\n+\troc_nix_bpf_stats_reset;\n \troc_nix_bpf_stats_to_idx;\n \troc_nix_cq_dump;\n \troc_nix_cq_fini;\n", "prefixes": [ "13/27" ] }