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{
    "id": 97300,
    "url": "http://patches.dpdk.org/api/patches/97300/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210825071510.7913-8-hemant.agrawal@nxp.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210825071510.7913-8-hemant.agrawal@nxp.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210825071510.7913-8-hemant.agrawal@nxp.com",
    "date": "2021-08-25T07:15:02",
    "name": "[07/15] crypto/dpaa2_sec: support AUTHENC with raw buffer APIs",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "7d2372e7a9425ac88416e052f0c834513994278c",
    "submitter": {
        "id": 477,
        "url": "http://patches.dpdk.org/api/people/477/?format=api",
        "name": "Hemant Agrawal",
        "email": "hemant.agrawal@nxp.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210825071510.7913-8-hemant.agrawal@nxp.com/mbox/",
    "series": [
        {
            "id": 18444,
            "url": "http://patches.dpdk.org/api/series/18444/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18444",
            "date": "2021-08-25T07:14:55",
            "name": "crypto: add raw vector support in DPAAx",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/18444/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/97300/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/97300/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Hemant Agrawal <hemant.agrawal@nxp.com>",
        "To": "dev@dpdk.org,\n\tgakhil@marvell.com",
        "Cc": "konstantin.ananyev@intel.com, roy.fan.zhang@intel.com,\n Gagandeep Singh <g.singh@nxp.com>",
        "Date": "Wed, 25 Aug 2021 12:45:02 +0530",
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        "References": "<20210812071244.28799-1-hemant.agrawal@nxp.com>\n <20210825071510.7913-1-hemant.agrawal@nxp.com>",
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        "Subject": "[dpdk-dev] [PATCH 07/15] crypto/dpaa2_sec: support AUTHENC with raw\n buffer APIs",
        "X-BeenThere": "dev@dpdk.org",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Gagandeep Singh <g.singh@nxp.com>\n\nThis patch supports AUTHENC with raw buufer APIs\n\nSigned-off-by: Gagandeep Singh <g.singh@nxp.com>\n---\n drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 128 ++++++++++++++++++--\n 1 file changed, 121 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c\nindex af052202d9..505431fc23 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c\n@@ -31,14 +31,128 @@ build_raw_dp_chain_fd(uint8_t *drv_ctx,\n \t\t       void *userdata,\n \t\t       struct qbman_fd *fd)\n {\n-\tRTE_SET_USED(drv_ctx);\n-\tRTE_SET_USED(sgl);\n-\tRTE_SET_USED(iv);\n-\tRTE_SET_USED(digest);\n \tRTE_SET_USED(auth_iv);\n-\tRTE_SET_USED(ofs);\n-\tRTE_SET_USED(userdata);\n-\tRTE_SET_USED(fd);\n+\n+\tdpaa2_sec_session *sess =\n+\t\t((struct dpaa2_sec_raw_dp_ctx *)drv_ctx)->session;\n+\tstruct ctxt_priv *priv = sess->ctxt;\n+\tstruct qbman_fle *fle, *sge, *ip_fle, *op_fle;\n+\tstruct sec_flow_context *flc;\n+\tint data_len = 0, auth_len = 0, cipher_len = 0;\n+\tunsigned int i = 0;\n+\tuint16_t auth_hdr_len = ofs.ofs.cipher.head -\n+\t\t\t\tofs.ofs.auth.head;\n+\n+\tuint16_t auth_tail_len = ofs.ofs.auth.tail;\n+\tuint32_t auth_only_len = (auth_tail_len << 16) | auth_hdr_len;\n+\tint icv_len = sess->digest_length;\n+\tuint8_t *old_icv;\n+\tuint8_t *iv_ptr = iv->va;\n+\n+\tfor (i = 0; i < sgl->num; i++)\n+\t\tdata_len += sgl->vec[i].len;\n+\n+\tcipher_len = data_len - ofs.ofs.cipher.head - ofs.ofs.cipher.tail;\n+\tauth_len = data_len - ofs.ofs.auth.head - ofs.ofs.auth.tail;\n+\t/* first FLE entry used to store session ctxt */\n+\tfle = (struct qbman_fle *)rte_malloc(NULL,\n+\t\t\tFLE_SG_MEM_SIZE(2 * sgl->num),\n+\t\t\tRTE_CACHE_LINE_SIZE);\n+\tif (unlikely(!fle)) {\n+\t\tDPAA2_SEC_ERR(\"AUTHENC SG: Memory alloc failed for SGE\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tmemset(fle, 0, FLE_SG_MEM_SIZE(2 * sgl->num));\n+\tDPAA2_SET_FLE_ADDR(fle, (size_t)userdata);\n+\tDPAA2_FLE_SAVE_CTXT(fle, (ptrdiff_t)priv);\n+\n+\top_fle = fle + 1;\n+\tip_fle = fle + 2;\n+\tsge = fle + 3;\n+\n+\t/* Save the shared descriptor */\n+\tflc = &priv->flc_desc[0].flc;\n+\n+\t/* Configure FD as a FRAME LIST */\n+\tDPAA2_SET_FD_ADDR(fd, DPAA2_VADDR_TO_IOVA(op_fle));\n+\tDPAA2_SET_FD_COMPOUND_FMT(fd);\n+\tDPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));\n+\n+\t/* Configure Output FLE with Scatter/Gather Entry */\n+\tDPAA2_SET_FLE_SG_EXT(op_fle);\n+\tDPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));\n+\n+\tif (auth_only_len)\n+\t\tDPAA2_SET_FLE_INTERNAL_JD(op_fle, auth_only_len);\n+\n+\top_fle->length = (sess->dir == DIR_ENC) ?\n+\t\t\t(cipher_len + icv_len) :\n+\t\t\tcipher_len;\n+\n+\t/* Configure Output SGE for Encap/Decap */\n+\tDPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);\n+\tDPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);\n+\tsge->length = sgl->vec[0].len - ofs.ofs.auth.head;\n+\n+\t/* o/p segs */\n+\tfor (i = 1; i < sgl->num; i++) {\n+\t\tsge++;\n+\t\tDPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);\n+\t\tDPAA2_SET_FLE_OFFSET(sge, 0);\n+\t\tsge->length = sgl->vec[i].len;\n+\t}\n+\n+\tif (sess->dir == DIR_ENC) {\n+\t\tsge++;\n+\t\tDPAA2_SET_FLE_ADDR(sge,\n+\t\t\tdigest->iova);\n+\t\tsge->length = icv_len;\n+\t}\n+\tDPAA2_SET_FLE_FIN(sge);\n+\n+\tsge++;\n+\n+\t/* Configure Input FLE with Scatter/Gather Entry */\n+\tDPAA2_SET_FLE_ADDR(ip_fle, DPAA2_VADDR_TO_IOVA(sge));\n+\tDPAA2_SET_FLE_SG_EXT(ip_fle);\n+\tDPAA2_SET_FLE_FIN(ip_fle);\n+\n+\tip_fle->length = (sess->dir == DIR_ENC) ?\n+\t\t\t(auth_len + sess->iv.length) :\n+\t\t\t(auth_len + sess->iv.length +\n+\t\t\ticv_len);\n+\n+\t/* Configure Input SGE for Encap/Decap */\n+\tDPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(iv_ptr));\n+\tsge->length = sess->iv.length;\n+\n+\tsge++;\n+\tDPAA2_SET_FLE_ADDR(sge, sgl->vec[0].iova);\n+\tDPAA2_SET_FLE_OFFSET(sge, ofs.ofs.auth.head);\n+\tsge->length = sgl->vec[0].len - ofs.ofs.auth.head;\n+\n+\tfor (i = 1; i < sgl->num; i++) {\n+\t\tsge++;\n+\t\tDPAA2_SET_FLE_ADDR(sge, sgl->vec[i].iova);\n+\t\tDPAA2_SET_FLE_OFFSET(sge, 0);\n+\t\tsge->length = sgl->vec[i].len;\n+\t}\n+\n+\tif (sess->dir == DIR_DEC) {\n+\t\tsge++;\n+\t\told_icv = (uint8_t *)(sge + 1);\n+\t\tmemcpy(old_icv, digest->va,\n+\t\t\ticv_len);\n+\t\tDPAA2_SET_FLE_ADDR(sge, DPAA2_VADDR_TO_IOVA(old_icv));\n+\t\tsge->length = icv_len;\n+\t}\n+\n+\tDPAA2_SET_FLE_FIN(sge);\n+\tif (auth_only_len) {\n+\t\tDPAA2_SET_FLE_INTERNAL_JD(ip_fle, auth_only_len);\n+\t\tDPAA2_SET_FD_INTERNAL_JD(fd, auth_only_len);\n+\t}\n+\tDPAA2_SET_FD_LEN(fd, ip_fle->length);\n \n \treturn 0;\n }\n",
    "prefixes": [
        "07/15"
    ]
}