Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/97123/?format=api
http://patches.dpdk.org/api/patches/97123/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1629407410-28822-3-git-send-email-nicolas.chautru@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1629407410-28822-3-git-send-email-nicolas.chautru@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1629407410-28822-3-git-send-email-nicolas.chautru@intel.com", "date": "2021-08-19T21:10:06", "name": "[v2,2/6] baseband/turbo_sw: add support for CRC16", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "652fb0f033116ce6b1820b73aeb0799675abb6cd", "submitter": { "id": 1314, "url": "http://patches.dpdk.org/api/people/1314/?format=api", "name": "Chautru, Nicolas", "email": "nicolas.chautru@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1629407410-28822-3-git-send-email-nicolas.chautru@intel.com/mbox/", "series": [ { "id": 18359, "url": "http://patches.dpdk.org/api/series/18359/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=18359", "date": "2021-08-19T21:10:04", "name": "bbdev update related to CRC usage", "version": 2, "mbox": "http://patches.dpdk.org/series/18359/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/97123/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/97123/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4C70CA0C4B;\n\tThu, 19 Aug 2021 23:10:25 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1DDCF41203;\n\tThu, 19 Aug 2021 23:10:22 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id 3CC244003D\n for <dev@dpdk.org>; Thu, 19 Aug 2021 23:10:18 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Aug 2021 14:10:17 -0700", "from unknown (HELO icx-npg-scs1-cp1.localdomain) ([10.233.180.245])\n by FMSMGA003.fm.intel.com with ESMTP; 19 Aug 2021 14:10:16 -0700" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10081\"; a=\"203799152\"", "E=Sophos;i=\"5.84,335,1620716400\"; d=\"scan'208\";a=\"203799152\"", "E=Sophos;i=\"5.84,335,1620716400\"; d=\"scan'208\";a=\"522606840\"" ], "X-ExtLoop1": "1", "From": "Nicolas Chautru <nicolas.chautru@intel.com>", "To": "dev@dpdk.org,\n\tgakhil@marvell.com", "Cc": "thomas@monjalon.net, trix@redhat.com, hemant.agrawal@nxp.com,\n mingshan.zhang@intel.com, arun.joshi@intel.com,\n Nicolas Chautru <nicolas.chautru@intel.com>", "Date": "Thu, 19 Aug 2021 14:10:06 -0700", "Message-Id": "<1629407410-28822-3-git-send-email-nicolas.chautru@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1629407410-28822-1-git-send-email-nicolas.chautru@intel.com>", "References": "<1629407410-28822-1-git-send-email-nicolas.chautru@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 2/6] baseband/turbo_sw: add support for CRC16", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This is to support the case for operation\nwhere CRC16 is to be appended or checked.\n\nSigned-off-by: Nicolas Chautru <nicolas.chautru@intel.com>\n---\n doc/guides/rel_notes/release_21_11.rst | 3 +++\n drivers/baseband/turbo_sw/bbdev_turbo_software.c | 17 +++++++++++++++++\n 2 files changed, 20 insertions(+)", "diff": "diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst\nindex 69dd518..8ca59b7 100644\n--- a/doc/guides/rel_notes/release_21_11.rst\n+++ b/doc/guides/rel_notes/release_21_11.rst\n@@ -55,6 +55,9 @@ New Features\n Also, make sure to start the actual text at the margin.\n =======================================================\n \n+* **Updated the turbo_sw bbdev PMD.**\n+\n+ Added support for more comprehensive CRC options.\n \n Removed Items\n -------------\ndiff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c\nindex 77e9a2e..e570044 100644\n--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c\n+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c\n@@ -199,6 +199,7 @@ struct turbo_sw_queue {\n \t\t\t.cap.ldpc_enc = {\n \t\t\t\t.capability_flags =\n \t\t\t\t\t\tRTE_BBDEV_LDPC_RATE_MATCH |\n+\t\t\t\t\t\tRTE_BBDEV_LDPC_CRC_16_ATTACH |\n \t\t\t\t\t\tRTE_BBDEV_LDPC_CRC_24A_ATTACH |\n \t\t\t\t\t\tRTE_BBDEV_LDPC_CRC_24B_ATTACH,\n \t\t\t\t.num_buffers_src =\n@@ -211,6 +212,7 @@ struct turbo_sw_queue {\n \t\t.type = RTE_BBDEV_OP_LDPC_DEC,\n \t\t.cap.ldpc_dec = {\n \t\t\t.capability_flags =\n+\t\t\t\t\tRTE_BBDEV_LDPC_CRC_TYPE_16_CHECK |\n \t\t\t\t\tRTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK |\n \t\t\t\t\tRTE_BBDEV_LDPC_CRC_TYPE_24A_CHECK |\n \t\t\t\t\tRTE_BBDEV_LDPC_CRC_TYPE_24B_DROP |\n@@ -880,6 +882,12 @@ struct turbo_sw_queue {\n \t\tcrc_req.len = in_length_in_bits - 24;\n \t\tcrc_resp.data = q->enc_in;\n \t\tbblib_lte_crc24b_gen(&crc_req, &crc_resp);\n+\t} else if (enc->op_flags & RTE_BBDEV_LDPC_CRC_16_ATTACH) {\n+\t\trte_memcpy(q->enc_in, in, in_length_in_bytes - 2);\n+\t\tcrc_req.data = in;\n+\t\tcrc_req.len = in_length_in_bits - 16;\n+\t\tcrc_resp.data = q->enc_in;\n+\t\tbblib_lte_crc16_gen(&crc_req, &crc_resp);\n \t} else\n \t\trte_memcpy(q->enc_in, in, in_length_in_bytes);\n \n@@ -1492,6 +1500,15 @@ struct turbo_sw_queue {\n \t\tif (!crc_resp.check_passed)\n \t\t\top->status |= 1 << RTE_BBDEV_CRC_ERROR;\n \t}\n+\tif (check_bit(dec->op_flags, RTE_BBDEV_LDPC_CRC_TYPE_16_CHECK)) {\n+\t\tcrc_req.data = adapter_input;\n+\t\tcrc_req.len = K - dec->n_filler - 16;\n+\t\tcrc_resp.check_passed = false;\n+\t\tcrc_resp.data = adapter_input;\n+\t\tbblib_lte_crc16_check(&crc_req, &crc_resp);\n+\t\tif (!crc_resp.check_passed)\n+\t\t\top->status |= 1 << RTE_BBDEV_CRC_ERROR;\n+\t}\n \n #ifdef RTE_BBDEV_OFFLOAD_COST\n \tq_stats->acc_offload_cycles += rte_rdtsc_precise() - start_time;\n", "prefixes": [ "v2", "2/6" ] }{ "id": 97123, "url": "