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GET /api/patches/95064/?format=api
{ "id": 95064, "url": "http://patches.dpdk.org/api/patches/95064/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210630124609.8711-11-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210630124609.8711-11-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210630124609.8711-11-suanmingm@nvidia.com", "date": "2021-06-30T12:45:57", "name": "[v2,10/22] net/mlx5: relax the list utility atomic operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "dbf1037688c37fdc5b69994a2787c399307446ca", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210630124609.8711-11-suanmingm@nvidia.com/mbox/", "series": [ { "id": 17549, "url": "http://patches.dpdk.org/api/series/17549/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17549", "date": "2021-06-30T12:45:47", "name": "net/mlx5: insertion rate optimization", "version": 2, "mbox": "http://patches.dpdk.org/series/17549/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/95064/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/95064/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 559B8A0A0F;\n\tWed, 30 Jun 2021 14:47:50 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4B6EA412A5;\n\tWed, 30 Jun 2021 14:47:00 +0200 (CEST)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2087.outbound.protection.outlook.com [40.107.236.87])\n by mails.dpdk.org (Postfix) with ESMTP id 8EE674129A\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>", "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>", "Date": "Wed, 30 Jun 2021 15:45:57 +0300", "Message-ID": "<20210630124609.8711-11-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20210630124609.8711-1-suanmingm@nvidia.com>", "References": "<20210527093403.1153127-1-suanmingm@nvidia.com>\n <20210630124609.8711-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "cd80e35f-6b46-4fc4-df4d-08d93bc52417", "X-MS-TrafficTypeDiagnostic": "CY4PR12MB1784:", "X-Microsoft-Antispam-PRVS": "\n <CY4PR12MB17843332C45CA641BA20C033C1019@CY4PR12MB1784.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:249;", "X-MS-Exchange-SenderADCheck": "1", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n SbOtEHQrFR07Ut2ABTpWoM39EQNC6KiyHqoynUkNkblA3pf2OFrTvyVQ63tWaZl5GQ402xZCyqamYZrhK5Ua2CDNymErNW7ccHYAiPgvwWe3BzHcAc1Fat7eAGl1r3ESLS/5i+2JXXand6OkLmRDoSPIVLRceTcJ3LRLPDzJyVFCp9ewHgdFD7YoVleVq1iYlG8m7jqOdXHYHN+9742sWraxzIVcNEQ0v24rzXhsy48ULXcsEB55cqC3LM4w2PW3VbCSuivpxNnDD8qGX1yI1X9mdOMFwjHWsE1v8p0oEB1xLnnWeHRbuRxz2YSGRP7XCHD37RrbB+MHKkHhSHs475j0XNB/Yc0+gCzx+Dcxjlken0xDly0GDius7TPTZb2qm7StqzHnI/2SyDUMHSsh7wZHMd3o0ePjl5rJ1Qbdwm1blQ/soyMsAdIzPiHnQU6my8FAr3d4rz6uTclUYs7oWiZ4NooN3fI0p9SGTiOrF9gMAgP1k7zvWPqurSUTIe0y4LxAwzkl5TCCtQxtJ8hXjIdARFleBO9NDaFow0dPDMuUx9dbXz8+MzvVfbEp9ap2qDmQMyAFDjwRohRDaWpyCBKu1FKfgjwvt5F2xu7ORwabGzR52CAvoUY1yfa9W+dNJ0fT3Hj3+RGOY+w09DYIUJYuLwg+ycMKSaED111Si/chjjvpAM6o5B1q1DYI9WX0f9z29dPAq+drcACFufj4nA==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(136003)(346002)(376002)(39860400002)(396003)(36840700001)(46966006)(70206006)(186003)(16526019)(83380400001)(6666004)(110136005)(316002)(36860700001)(70586007)(1076003)(86362001)(54906003)(7696005)(47076005)(4326008)(356005)(82310400003)(55016002)(8936002)(5660300002)(6636002)(426003)(7636003)(26005)(82740400003)(2616005)(8676002)(6286002)(336012)(2906002)(36756003)(478600001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Jun 2021 12:46:54.8057 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n cd80e35f-6b46-4fc4-df4d-08d93bc52417", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT045.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR12MB1784", "Subject": "[dpdk-dev] [PATCH v2 10/22] net/mlx5: relax the list utility atomic\n operations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Matan Azrad <matan@nvidia.com>\n\nThe atomic operation in the list utility no need a barriers because the\ncritical part are managed by RW lock.\n\nRelax them.\n\nSigned-off-by: Matan Azrad <matan@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_utils.c | 12 ++++++------\n 1 file changed, 6 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_utils.c b/drivers/net/mlx5/mlx5_utils.c\nindex 7cdf44dcf7..29248c80ed 100644\n--- a/drivers/net/mlx5/mlx5_utils.c\n+++ b/drivers/net/mlx5/mlx5_utils.c\n@@ -50,13 +50,13 @@ __list_lookup(struct mlx5_list *list, int lcore_index, void *ctx, bool reuse)\n \t\tif (list->cb_match(list, entry, ctx) == 0) {\n \t\t\tif (reuse) {\n \t\t\t\tret = __atomic_add_fetch(&entry->ref_cnt, 1,\n-\t\t\t\t\t\t\t __ATOMIC_ACQUIRE) - 1;\n+\t\t\t\t\t\t\t __ATOMIC_RELAXED) - 1;\n \t\t\t\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p ref: %u.\",\n \t\t\t\t\tlist->name, (void *)entry,\n \t\t\t\t\tentry->ref_cnt);\n \t\t\t} else if (lcore_index < RTE_MAX_LCORE) {\n \t\t\t\tret = __atomic_load_n(&entry->ref_cnt,\n-\t\t\t\t\t\t __ATOMIC_ACQUIRE);\n+\t\t\t\t\t\t __ATOMIC_RELAXED);\n \t\t\t}\n \t\t\tif (likely(ret != 0 || lcore_index == RTE_MAX_LCORE))\n \t\t\t\treturn entry;\n@@ -181,7 +181,7 @@ mlx5_list_register(struct mlx5_list *list, void *ctx)\n \tlist->gen_cnt++;\n \trte_rwlock_write_unlock(&list->lock);\n \tLIST_INSERT_HEAD(&list->cache[lcore_index].h, local_entry, next);\n-\t__atomic_add_fetch(&list->count, 1, __ATOMIC_ACQUIRE);\n+\t__atomic_add_fetch(&list->count, 1, __ATOMIC_RELAXED);\n \tDRV_LOG(DEBUG, \"mlx5 list %s entry %p new: %u.\", list->name,\n \t\t(void *)entry, entry->ref_cnt);\n \treturn local_entry;\n@@ -194,7 +194,7 @@ mlx5_list_unregister(struct mlx5_list *list,\n \tstruct mlx5_list_entry *gentry = entry->gentry;\n \tint lcore_idx;\n \n-\tif (__atomic_sub_fetch(&entry->ref_cnt, 1, __ATOMIC_ACQUIRE) != 0)\n+\tif (__atomic_sub_fetch(&entry->ref_cnt, 1, __ATOMIC_RELAXED) != 0)\n \t\treturn 1;\n \tlcore_idx = rte_lcore_index(rte_lcore_id());\n \tMLX5_ASSERT(lcore_idx < RTE_MAX_LCORE);\n@@ -207,14 +207,14 @@ mlx5_list_unregister(struct mlx5_list *list,\n \t} else {\n \t\treturn 0;\n \t}\n-\tif (__atomic_sub_fetch(&gentry->ref_cnt, 1, __ATOMIC_ACQUIRE) != 0)\n+\tif (__atomic_sub_fetch(&gentry->ref_cnt, 1, __ATOMIC_RELAXED) != 0)\n \t\treturn 1;\n \trte_rwlock_write_lock(&list->lock);\n \tif (likely(gentry->ref_cnt == 0)) {\n \t\tLIST_REMOVE(gentry, next);\n \t\trte_rwlock_write_unlock(&list->lock);\n \t\tlist->cb_remove(list, gentry);\n-\t\t__atomic_sub_fetch(&list->count, 1, __ATOMIC_ACQUIRE);\n+\t\t__atomic_sub_fetch(&list->count, 1, __ATOMIC_RELAXED);\n \t\tDRV_LOG(DEBUG, \"mlx5 list %s entry %p removed.\",\n \t\t\tlist->name, (void *)gentry);\n \t\treturn 0;\n", "prefixes": [ "v2", "10/22" ] }