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GET /api/patches/94005/?format=api
http://patches.dpdk.org/api/patches/94005/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210607175943.31690-50-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210607175943.31690-50-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210607175943.31690-50-ndabilpuram@marvell.com", "date": "2021-06-07T17:59:30", "name": "[v2,49/62] net/cnxk: add initial version of rte flow support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "072330c0615c7439249436d72513ac4978856c48", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210607175943.31690-50-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 17256, "url": "http://patches.dpdk.org/api/series/17256/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=17256", "date": "2021-06-07T17:58:41", "name": "Marvell CNXK Ethdev Driver", "version": 2, "mbox": "http://patches.dpdk.org/series/17256/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/94005/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/94005/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6FA5FA034F;\n\tMon, 7 Jun 2021 20:09:11 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D4233411B2;\n\tMon, 7 Jun 2021 20:05:39 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id BF7AE411F9\n for <dev@dpdk.org>; Mon, 7 Jun 2021 20:05:37 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 157I1bO9017514 for <dev@dpdk.org>; Mon, 7 Jun 2021 11:05:36 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 391ecv2epe-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 07 Jun 2021 11:05:36 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 7 Jun 2021 11:05:35 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 7 Jun 2021 11:05:35 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id A96983F7040;\n Mon, 7 Jun 2021 11:05:32 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=Ly7fBhLr1mzbQ2xLjq4WoAsoX/vgXg4060bmfBNpDXo=;\n b=H+EfxgU6x0UG3wQbePLtojWCxRisUVN6/99rXF7BPxTZlHbJNucBfaIqQCZ4v6iyv84+\n f+i1CVvn59V8rlBL9ujSGUWd/n0frNWpRMWcjqde1yegQdmsuQP8A2jD8UpX/7HZkzzJ\n G+0vhRR4ubU9GjxGjRS9hS1TQwO+UxWDx6N/dfuuZjFynM4E1gE4RoE24p0U+P5eEy2K\n h+FQw7XPPJWkqg2/l23Z/0OhCvzHsuk3Lw6HSr0BMzGZxe91sDuAmBceLRI5IhJzwSsh\n 6Ccrm5vOOeopDMO2sV8g1QnUxK9C48uW7PdzuTHRmC0XU8k9HihlucSVy2D17WXEO+PR Aw==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>", "Date": "Mon, 7 Jun 2021 23:29:30 +0530", "Message-ID": "<20210607175943.31690-50-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210607175943.31690-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>\n <20210607175943.31690-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "2eS04kU6-Zm0oCYRBDNBhzyXkIbWlTTf", "X-Proofpoint-ORIG-GUID": "2eS04kU6-Zm0oCYRBDNBhzyXkIbWlTTf", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-06-07_14:2021-06-04,\n 2021-06-07 signatures=0", "Subject": "[dpdk-dev] [PATCH v2 49/62] net/cnxk: add initial version of rte\n flow support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kiran Kumar K <kirankumark@marvell.com>\n\nAdding initial version of rte_flow support for cnxk family device.\nSupported rte_flow ops are flow_validate, flow_create, flow_crstroy,\nflow_flush, flow_query, flow_isolate.\n\nSigned-off-by: Kiran Kumar K <kirankumark@marvell.com>\n---\n doc/guides/nics/cnxk.rst | 118 ++++++++++++++++\n doc/guides/nics/features/cnxk.ini | 42 ++++++\n drivers/net/cnxk/cnxk_rte_flow.c | 282 ++++++++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cnxk_rte_flow.h | 69 ++++++++++\n drivers/net/cnxk/meson.build | 1 +\n 5 files changed, 512 insertions(+)\n create mode 100644 drivers/net/cnxk/cnxk_rte_flow.c\n create mode 100644 drivers/net/cnxk/cnxk_rte_flow.h", "diff": "diff --git a/doc/guides/nics/cnxk.rst b/doc/guides/nics/cnxk.rst\nindex c2a6fbb..87401f0 100644\n--- a/doc/guides/nics/cnxk.rst\n+++ b/doc/guides/nics/cnxk.rst\n@@ -24,6 +24,7 @@ Features of the CNXK Ethdev PMD are:\n - Multiple queues for TX and RX\n - Receiver Side Scaling (RSS)\n - MAC filtering\n+- Generic flow API\n - Inner and Outer Checksum offload\n - Port hardware statistics\n - Link state information\n@@ -222,3 +223,120 @@ Debugging Options\n +---+------------+-------------------------------------------------------+\n | 2 | NPC | --log-level='pmd\\.net.cnxk\\.flow,8' |\n +---+------------+-------------------------------------------------------+\n+\n+RTE Flow Support\n+----------------\n+\n+The OCTEON CN9K/CN10K SoC family NIC has support for the following patterns and\n+actions.\n+\n+Patterns:\n+\n+.. _table_cnxk_supported_flow_item_types:\n+\n+.. table:: Item types\n+\n+ +----+--------------------------------+\n+ | # | Pattern Type |\n+ +====+================================+\n+ | 1 | RTE_FLOW_ITEM_TYPE_ETH |\n+ +----+--------------------------------+\n+ | 2 | RTE_FLOW_ITEM_TYPE_VLAN |\n+ +----+--------------------------------+\n+ | 3 | RTE_FLOW_ITEM_TYPE_E_TAG |\n+ +----+--------------------------------+\n+ | 4 | RTE_FLOW_ITEM_TYPE_IPV4 |\n+ +----+--------------------------------+\n+ | 5 | RTE_FLOW_ITEM_TYPE_IPV6 |\n+ +----+--------------------------------+\n+ | 6 | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|\n+ +----+--------------------------------+\n+ | 7 | RTE_FLOW_ITEM_TYPE_MPLS |\n+ +----+--------------------------------+\n+ | 8 | RTE_FLOW_ITEM_TYPE_ICMP |\n+ +----+--------------------------------+\n+ | 9 | RTE_FLOW_ITEM_TYPE_UDP |\n+ +----+--------------------------------+\n+ | 10 | RTE_FLOW_ITEM_TYPE_TCP |\n+ +----+--------------------------------+\n+ | 11 | RTE_FLOW_ITEM_TYPE_SCTP |\n+ +----+--------------------------------+\n+ | 12 | RTE_FLOW_ITEM_TYPE_ESP |\n+ +----+--------------------------------+\n+ | 13 | RTE_FLOW_ITEM_TYPE_GRE |\n+ +----+--------------------------------+\n+ | 14 | RTE_FLOW_ITEM_TYPE_NVGRE |\n+ +----+--------------------------------+\n+ | 15 | RTE_FLOW_ITEM_TYPE_VXLAN |\n+ +----+--------------------------------+\n+ | 16 | RTE_FLOW_ITEM_TYPE_GTPC |\n+ +----+--------------------------------+\n+ | 17 | RTE_FLOW_ITEM_TYPE_GTPU |\n+ +----+--------------------------------+\n+ | 18 | RTE_FLOW_ITEM_TYPE_GENEVE |\n+ +----+--------------------------------+\n+ | 19 | RTE_FLOW_ITEM_TYPE_VXLAN_GPE |\n+ +----+--------------------------------+\n+ | 20 | RTE_FLOW_ITEM_TYPE_IPV6_EXT |\n+ +----+--------------------------------+\n+ | 21 | RTE_FLOW_ITEM_TYPE_VOID |\n+ +----+--------------------------------+\n+ | 22 | RTE_FLOW_ITEM_TYPE_ANY |\n+ +----+--------------------------------+\n+ | 23 | RTE_FLOW_ITEM_TYPE_GRE_KEY |\n+ +----+--------------------------------+\n+ | 24 | RTE_FLOW_ITEM_TYPE_HIGIG2 |\n+ +----+--------------------------------+\n+\n+.. note::\n+\n+ ``RTE_FLOW_ITEM_TYPE_GRE_KEY`` works only when checksum and routing\n+ bits in the GRE header are equal to 0.\n+\n+Actions:\n+\n+.. _table_cnxk_supported_ingress_action_types:\n+\n+.. table:: Ingress action types\n+\n+ +----+-----------------------------------------+\n+ | # | Action Type |\n+ +====+=========================================+\n+ | 1 | RTE_FLOW_ACTION_TYPE_VOID |\n+ +----+-----------------------------------------+\n+ | 2 | RTE_FLOW_ACTION_TYPE_MARK |\n+ +----+-----------------------------------------+\n+ | 3 | RTE_FLOW_ACTION_TYPE_FLAG |\n+ +----+-----------------------------------------+\n+ | 4 | RTE_FLOW_ACTION_TYPE_COUNT |\n+ +----+-----------------------------------------+\n+ | 5 | RTE_FLOW_ACTION_TYPE_DROP |\n+ +----+-----------------------------------------+\n+ | 6 | RTE_FLOW_ACTION_TYPE_QUEUE |\n+ +----+-----------------------------------------+\n+ | 7 | RTE_FLOW_ACTION_TYPE_RSS |\n+ +----+-----------------------------------------+\n+ | 8 | RTE_FLOW_ACTION_TYPE_PF |\n+ +----+-----------------------------------------+\n+ | 9 | RTE_FLOW_ACTION_TYPE_VF |\n+ +----+-----------------------------------------+\n+ | 10 | RTE_FLOW_ACTION_TYPE_OF_POP_VLAN |\n+ +----+-----------------------------------------+\n+\n+.. _table_cnxk_supported_egress_action_types:\n+\n+.. table:: Egress action types\n+\n+ +----+-----------------------------------------+\n+ | # | Action Type |\n+ +====+=========================================+\n+ | 1 | RTE_FLOW_ACTION_TYPE_COUNT |\n+ +----+-----------------------------------------+\n+ | 2 | RTE_FLOW_ACTION_TYPE_DROP |\n+ +----+-----------------------------------------+\n+ | 3 | RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN |\n+ +----+-----------------------------------------+\n+ | 4 | RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID |\n+ +----+-----------------------------------------+\n+ | 5 | RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP |\n+ +----+-----------------------------------------+\ndiff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 192c15a..3c59494 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -39,3 +39,45 @@ Module EEPROM dump = Y\n Linux = Y\n ARMv8 = Y\n Usage doc = Y\n+\n+[rte_flow items]\n+any = Y\n+arp_eth_ipv4 = Y\n+esp = Y\n+eth = Y\n+e_tag = Y\n+geneve = Y\n+gre = Y\n+gre_key = Y\n+gtpc = Y\n+gtpu = Y\n+higig2 = Y\n+icmp = Y\n+ipv4 = Y\n+ipv6 = Y\n+ipv6_ext = Y\n+mpls = Y\n+nvgre = Y\n+raw = Y\n+sctp = Y\n+tcp = Y\n+udp = Y\n+vlan = Y\n+vxlan = Y\n+vxlan_gpe = Y\n+\n+[rte_flow actions]\n+count = Y\n+drop = Y\n+flag = Y\n+mark = Y\n+of_pop_vlan = Y\n+of_push_vlan = Y\n+of_set_vlan_pcp = Y\n+of_set_vlan_vid = Y\n+pf = Y\n+port_id = Y\n+queue = Y\n+rss = Y\n+security = Y\n+vf = Y\ndiff --git a/drivers/net/cnxk/cnxk_rte_flow.c b/drivers/net/cnxk/cnxk_rte_flow.c\nnew file mode 100644\nindex 0000000..d0e7bdc\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rte_flow.c\n@@ -0,0 +1,282 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#include <cnxk_rte_flow.h>\n+\n+static int\n+cnxk_map_actions(struct rte_eth_dev *dev,\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct roc_npc_action in_actions[])\n+{\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tconst struct rte_flow_action_count *act_count;\n+\tconst struct rte_flow_action_queue *act_q;\n+\tint rq;\n+\tint i = 0;\n+\n+\tRTE_SET_USED(hw);\n+\n+\tfor (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {\n+\t\tswitch (actions->type) {\n+\t\tcase RTE_FLOW_ACTION_TYPE_VOID:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_VOID;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_MARK:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_MARK;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_FLAG:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_FLAG;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_COUNT:\n+\t\t\tact_count = (const struct rte_flow_action_count *)\n+\t\t\t\t\t actions->conf;\n+\n+\t\t\tif (act_count->shared == 1) {\n+\t\t\t\tplt_npc_dbg(\"Shared counter is not supported\");\n+\t\t\t\tgoto err_exit;\n+\t\t\t}\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_COUNT;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_DROP:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_DROP;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_PF:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_PF;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_VF:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_VF;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_QUEUE:\n+\t\t\tact_q = (const struct rte_flow_action_queue *)\n+\t\t\t\t\tactions->conf;\n+\t\t\trq = act_q->index;\n+\t\t\tif (rq >= dev->data->nb_rx_queues) {\n+\t\t\t\tplt_npc_dbg(\"Invalid queue index\");\n+\t\t\t\tgoto err_exit;\n+\t\t\t}\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_QUEUE;\n+\t\t\tin_actions[i].conf = actions->conf;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_RSS:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_RSS;\n+\t\t\tbreak;\n+\n+\t\tcase RTE_FLOW_ACTION_TYPE_SECURITY:\n+\t\t\tin_actions[i].type = ROC_NPC_ACTION_TYPE_SEC;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tplt_npc_dbg(\"Action is not supported = %d\",\n+\t\t\t\t actions->type);\n+\t\t\tgoto err_exit;\n+\t\t}\n+\t\ti++;\n+\t}\n+\tin_actions[i].type = ROC_NPC_ACTION_TYPE_END;\n+\treturn 0;\n+\n+err_exit:\n+\treturn -EINVAL;\n+}\n+\n+static int\n+cnxk_map_flow_data(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct roc_npc_attr *in_attr,\n+\t\t struct roc_npc_item_info in_pattern[],\n+\t\t struct roc_npc_action in_actions[])\n+{\n+\tint i = 0;\n+\n+\tin_attr->priority = attr->priority;\n+\tin_attr->ingress = attr->ingress;\n+\tin_attr->egress = attr->egress;\n+\n+\twhile (pattern->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\tin_pattern[i].spec = pattern->spec;\n+\t\tin_pattern[i].last = pattern->last;\n+\t\tin_pattern[i].mask = pattern->mask;\n+\t\tin_pattern[i].type = term[pattern->type].item_type;\n+\t\tin_pattern[i].size = term[pattern->type].item_size;\n+\t\tpattern++;\n+\t\ti++;\n+\t}\n+\tin_pattern[i].type = ROC_NPC_ITEM_TYPE_END;\n+\n+\treturn cnxk_map_actions(dev, actions, in_actions);\n+}\n+\n+static int\n+cnxk_flow_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_item_info in_pattern[ROC_NPC_ITEM_TYPE_END + 1];\n+\tstruct roc_npc_action in_actions[ROC_NPC_MAX_ACTION_COUNT];\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tstruct roc_npc *npc = &hw->npc;\n+\tstruct roc_npc_attr in_attr;\n+\tstruct roc_npc_flow flow;\n+\tint rc;\n+\n+\tmemset(&flow, 0, sizeof(flow));\n+\n+\trc = cnxk_map_flow_data(dev, attr, pattern, actions, &in_attr,\n+\t\t\t\tin_pattern, in_actions);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_ACTION_NUM,\n+\t\t\t\t NULL, \"Failed to map flow data\");\n+\t\treturn rc;\n+\t}\n+\n+\treturn roc_npc_flow_parse(npc, &in_attr, in_pattern, in_actions, &flow);\n+}\n+\n+static struct rte_flow *\n+cnxk_flow_create(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,\n+\t\t const struct rte_flow_item pattern[],\n+\t\t const struct rte_flow_action actions[],\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tstruct roc_npc_item_info in_pattern[ROC_NPC_ITEM_TYPE_END + 1];\n+\tstruct roc_npc_action in_actions[ROC_NPC_MAX_ACTION_COUNT];\n+\tstruct roc_npc *npc = &hw->npc;\n+\tstruct roc_npc_attr in_attr;\n+\tstruct roc_npc_flow *flow;\n+\tint errcode;\n+\tint rc;\n+\n+\trc = cnxk_map_flow_data(dev, attr, pattern, actions, &in_attr,\n+\t\t\t\tin_pattern, in_actions);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, 0, RTE_FLOW_ERROR_TYPE_ACTION_NUM,\n+\t\t\t\t NULL, \"Failed to map flow data\");\n+\t\treturn NULL;\n+\t}\n+\n+\tflow = roc_npc_flow_create(npc, &in_attr, in_pattern, in_actions,\n+\t\t\t\t &errcode);\n+\tif (errcode != 0) {\n+\t\trte_flow_error_set(error, errcode, errcode, NULL,\n+\t\t\t\t roc_error_msg_get(errcode));\n+\t\treturn NULL;\n+\t}\n+\n+\treturn (struct rte_flow *)flow;\n+}\n+\n+static int\n+cnxk_flow_destroy(struct rte_eth_dev *dev, struct rte_flow *flow,\n+\t\t struct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *in_flow = (struct roc_npc_flow *)flow;\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tstruct roc_npc *npc = &hw->npc;\n+\tint rc;\n+\n+\trc = roc_npc_flow_destroy(npc, in_flow);\n+\tif (rc)\n+\t\trte_flow_error_set(error, rc, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Flow Destroy failed\");\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *error)\n+{\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tstruct roc_npc *npc = &hw->npc;\n+\tint rc;\n+\n+\trc = roc_npc_mcam_free_all_resources(npc);\n+\tif (rc) {\n+\t\trte_flow_error_set(error, EIO, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"Failed to flush filter\");\n+\t\treturn -rte_errno;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_flow_query(struct rte_eth_dev *dev, struct rte_flow *flow,\n+\t\tconst struct rte_flow_action *action, void *data,\n+\t\tstruct rte_flow_error *error)\n+{\n+\tstruct roc_npc_flow *in_flow = (struct roc_npc_flow *)flow;\n+\tstruct cnxk_eth_dev *hw = dev->data->dev_private;\n+\tstruct roc_npc *npc = &hw->npc;\n+\tstruct rte_flow_query_count *query = data;\n+\tconst char *errmsg = NULL;\n+\tint errcode = ENOTSUP;\n+\tint rc;\n+\n+\tif (action->type != RTE_FLOW_ACTION_TYPE_COUNT) {\n+\t\terrmsg = \"Only COUNT is supported in query\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\tif (in_flow->ctr_id == NPC_COUNTER_NONE) {\n+\t\terrmsg = \"Counter is not available\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\trc = roc_npc_mcam_read_counter(npc, in_flow->ctr_id, &query->hits);\n+\tif (rc != 0) {\n+\t\terrcode = EIO;\n+\t\terrmsg = \"Error reading flow counter\";\n+\t\tgoto err_exit;\n+\t}\n+\tquery->hits_set = 1;\n+\tquery->bytes_set = 0;\n+\n+\tif (query->reset)\n+\t\trc = roc_npc_mcam_clear_counter(npc, in_flow->ctr_id);\n+\tif (rc != 0) {\n+\t\terrcode = EIO;\n+\t\terrmsg = \"Error clearing flow counter\";\n+\t\tgoto err_exit;\n+\t}\n+\n+\treturn 0;\n+\n+err_exit:\n+\trte_flow_error_set(error, errcode, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t NULL, errmsg);\n+\treturn -rte_errno;\n+}\n+\n+static int\n+cnxk_flow_isolate(struct rte_eth_dev *dev __rte_unused, int enable __rte_unused,\n+\t\t struct rte_flow_error *error)\n+{\n+\t/* If we support, we need to un-install the default mcam\n+\t * entry for this port.\n+\t */\n+\n+\trte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t NULL, \"Flow isolation not supported\");\n+\n+\treturn -rte_errno;\n+}\n+\n+const struct rte_flow_ops cnxk_flow_ops = {\n+\t.validate = cnxk_flow_validate,\n+\t.create = cnxk_flow_create,\n+\t.destroy = cnxk_flow_destroy,\n+\t.flush = cnxk_flow_flush,\n+\t.query = cnxk_flow_query,\n+\t.isolate = cnxk_flow_isolate,\n+};\ndiff --git a/drivers/net/cnxk/cnxk_rte_flow.h b/drivers/net/cnxk/cnxk_rte_flow.h\nnew file mode 100644\nindex 0000000..3740226\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_rte_flow.h\n@@ -0,0 +1,69 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+#ifndef __CNXK_RTE_FLOW_H__\n+#define __CNXK_RTE_FLOW_H__\n+\n+#include <rte_flow_driver.h>\n+#include <rte_malloc.h>\n+\n+#include \"cnxk_ethdev.h\"\n+#include \"roc_api.h\"\n+#include \"roc_npc_priv.h\"\n+\n+struct cnxk_rte_flow_term_info {\n+\tuint16_t item_type;\n+\tuint16_t item_size;\n+};\n+\n+struct cnxk_rte_flow_term_info term[] = {\n+\t[RTE_FLOW_ITEM_TYPE_ETH] = {ROC_NPC_ITEM_TYPE_ETH,\n+\t\t\t\t sizeof(struct rte_flow_item_eth)},\n+\t[RTE_FLOW_ITEM_TYPE_VLAN] = {ROC_NPC_ITEM_TYPE_VLAN,\n+\t\t\t\t sizeof(struct rte_flow_item_vlan)},\n+\t[RTE_FLOW_ITEM_TYPE_E_TAG] = {ROC_NPC_ITEM_TYPE_E_TAG,\n+\t\t\t\t sizeof(struct rte_flow_item_e_tag)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV4] = {ROC_NPC_ITEM_TYPE_IPV4,\n+\t\t\t\t sizeof(struct rte_flow_item_ipv4)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6] = {ROC_NPC_ITEM_TYPE_IPV6,\n+\t\t\t\t sizeof(struct rte_flow_item_ipv6)},\n+\t[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {ROC_NPC_ITEM_TYPE_ARP_ETH_IPV4,\n+\t\t sizeof(struct rte_flow_item_arp_eth_ipv4)},\n+\t[RTE_FLOW_ITEM_TYPE_MPLS] = {ROC_NPC_ITEM_TYPE_MPLS,\n+\t\t\t\t sizeof(struct rte_flow_item_mpls)},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP] = {ROC_NPC_ITEM_TYPE_ICMP,\n+\t\t\t\t sizeof(struct rte_flow_item_icmp)},\n+\t[RTE_FLOW_ITEM_TYPE_UDP] = {ROC_NPC_ITEM_TYPE_UDP,\n+\t\t\t\t sizeof(struct rte_flow_item_udp)},\n+\t[RTE_FLOW_ITEM_TYPE_TCP] = {ROC_NPC_ITEM_TYPE_TCP,\n+\t\t\t\t sizeof(struct rte_flow_item_tcp)},\n+\t[RTE_FLOW_ITEM_TYPE_SCTP] = {ROC_NPC_ITEM_TYPE_SCTP,\n+\t\t\t\t sizeof(struct rte_flow_item_sctp)},\n+\t[RTE_FLOW_ITEM_TYPE_ESP] = {ROC_NPC_ITEM_TYPE_ESP,\n+\t\t\t\t sizeof(struct rte_flow_item_esp)},\n+\t[RTE_FLOW_ITEM_TYPE_GRE] = {ROC_NPC_ITEM_TYPE_GRE,\n+\t\t\t\t sizeof(struct rte_flow_item_gre)},\n+\t[RTE_FLOW_ITEM_TYPE_NVGRE] = {ROC_NPC_ITEM_TYPE_NVGRE,\n+\t\t\t\t sizeof(struct rte_flow_item_nvgre)},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN] = {ROC_NPC_ITEM_TYPE_VXLAN,\n+\t\t\t\t sizeof(struct rte_flow_item_vxlan)},\n+\t[RTE_FLOW_ITEM_TYPE_GTPC] = {ROC_NPC_ITEM_TYPE_GTPC,\n+\t\t\t\t sizeof(struct rte_flow_item_gtp)},\n+\t[RTE_FLOW_ITEM_TYPE_GTPU] = {ROC_NPC_ITEM_TYPE_GTPU,\n+\t\t\t\t sizeof(struct rte_flow_item_gtp)},\n+\t[RTE_FLOW_ITEM_TYPE_GENEVE] = {ROC_NPC_ITEM_TYPE_GENEVE,\n+\t\t\t\t sizeof(struct rte_flow_item_geneve)},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {ROC_NPC_ITEM_TYPE_VXLAN_GPE,\n+\t\t\tsizeof(struct rte_flow_item_vxlan_gpe)},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {ROC_NPC_ITEM_TYPE_IPV6_EXT,\n+\t\t\t\t\t sizeof(struct rte_flow_item_ipv6_ext)},\n+\t[RTE_FLOW_ITEM_TYPE_VOID] = {ROC_NPC_ITEM_TYPE_VOID, 0},\n+\t[RTE_FLOW_ITEM_TYPE_ANY] = {ROC_NPC_ITEM_TYPE_ANY, 0},\n+\t[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {ROC_NPC_ITEM_TYPE_GRE_KEY,\n+\t\t\t\t\tsizeof(uint32_t)},\n+\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {\n+\t\tROC_NPC_ITEM_TYPE_HIGIG2,\n+\t\tsizeof(struct rte_flow_item_higig2_hdr)}\n+};\n+\n+#endif /* __CNXK_RTE_FLOW_H__ */\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex e0ab9d6..92ef8f0 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -13,6 +13,7 @@ sources = files('cnxk_ethdev.c',\n \t\t'cnxk_ethdev_devargs.c',\n \t\t'cnxk_link.c',\n \t\t'cnxk_lookup.c',\n+\t\t'cnxk_rte_flow.c',\n \t\t'cnxk_stats.c')\n \n # CN9K\n", "prefixes": [ "v2", "49/62" ] }{ "id": 94005, "url": "