get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/92800/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 92800,
    "url": "http://patches.dpdk.org/api/patches/92800/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210505064104.30248-2-bingz@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210505064104.30248-2-bingz@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210505064104.30248-2-bingz@nvidia.com",
    "date": "2021-05-05T06:40:48",
    "name": "[v3,01/17] common/mlx5: add connection tracking object definition",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "dd2d9cb3d451c99e2492eb1bd7891092c5f97129",
    "submitter": {
        "id": 1976,
        "url": "http://patches.dpdk.org/api/people/1976/?format=api",
        "name": "Bing Zhao",
        "email": "bingz@nvidia.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210505064104.30248-2-bingz@nvidia.com/mbox/",
    "series": [
        {
            "id": 16817,
            "url": "http://patches.dpdk.org/api/series/16817/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16817",
            "date": "2021-05-05T06:40:47",
            "name": "conntrack support in mlx5 PMD",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/16817/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/92800/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/92800/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 228ADA0524;\n\tWed,  5 May 2021 08:41:46 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0842D410E9;\n\tWed,  5 May 2021 08:41:45 +0200 (CEST)",
            "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2048.outbound.protection.outlook.com [40.107.236.48])\n by mails.dpdk.org (Postfix) with ESMTP id 3DEA4410E5\n for <dev@dpdk.org>; Wed,  5 May 2021 08:41:44 +0200 (CEST)",
            "from DM3PR12CA0052.namprd12.prod.outlook.com (2603:10b6:0:56::20) by\n BN7PR12MB2657.namprd12.prod.outlook.com (2603:10b6:408:32::15) with\n Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.4087.44; Wed, 5 May 2021 06:41:42 +0000",
            "from DM6NAM11FT041.eop-nam11.prod.protection.outlook.com\n (2603:10b6:0:56:cafe::ad) by DM3PR12CA0052.outlook.office365.com\n (2603:10b6:0:56::20) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.25 via Frontend\n Transport; Wed, 5 May 2021 06:41:42 +0000",
            "from mail.nvidia.com (216.228.112.34) by\n DM6NAM11FT041.mail.protection.outlook.com (10.13.172.98) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4108.25 via Frontend Transport; Wed, 5 May 2021 06:41:42 +0000",
            "from nvidia.com (172.20.145.6) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 5 May\n 2021 06:41:35 +0000"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=fiDCb8/1VzUPf9ioGbTDmTpS+4aZGWQojnpsWDWxSBxSbJO7PnoJH/EZHpaIQDj1i8CrBjmmtvjeDuhg1SCFqbzD3MoTB7GmH7VIn1MV+4bLQEbG9fUEpwt5KWr8VpLmCOmvhmFrpx731Wb6SCUQ8jawnBQeWNSgn52QPt2AJrDnEXox9Q7a2xeS4tkMXD1anV2yxausPHp9cQLPHOjaJ1loQazr82Vbsm7UnsSj/GTFFdTtHjKOvPnn8UKBc/aCKT9SP3nvaO32d7vVh/xCBFv/1V64JLwVqabzWZorYPxqiWIKAtW9Yu7Z0eQFJc8BFU2Rotwk8cwUQ5IJEJhRyg==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=TzjKxqdDoA0Oq0vxFgH0kH2QG6IPKOJs/6eAPWmHA04=;\n b=kV84IFD9JIehiH36amQp7zGarj9PsUF3DN9kckhn6aqTvMNNRDAaI2uPE9RCg+QkLciQ0JTj0BN+WX3znqBOqcg5dShFhtmMo4R8NGDg2cDxpspUR8smfNgyKJsuCwKT/QbXNxNZBDL+CH/Fn2eK8ewUU8IYfUNbUSC+h6dknCnO+cR5G0MY5Y/U1R+LSceAsyBhHCzITH8fLzzJc3pM09c4atdWfWms626y1QEXMCuxSvPHRFUeRemkNNfwbRWTF8PzNSREuHHgMy4EbLOPbbUDCULHZpQ0FvkR+XCiZ/8zSFl0F5l4v74uk8wOmrkUDYAmFZcDvSxNE0LF0EuHTg==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=none sp=none pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=TzjKxqdDoA0Oq0vxFgH0kH2QG6IPKOJs/6eAPWmHA04=;\n b=Zq3xraTbfZOD2zJfKNDHWehK6LC0PTjj7hN26a3c7bsCp8HcWXAcLqgVAt2RR6DZc4RsH8XSZMj+X8JgY6H4VF3iP4gQb1DclPpC+s045kTiWseYjSqJtxxTWR86MNsHpPua9glLojTM3eL7xYdwAwR4gewkWDngoQu6QtQcadCm4hsVWE3RzcAF30c7qStvBE1C16Z6KoJQxVHuTRxrqUA7M0KU2DGUnoCMOQJ6c0J5Vudwtr6U9G+CslX1Wa8IEDGEchehsHGSPvWyGs5uxVl7NWarGRRoJI/pyPgZUEzmVJ0H+QJFugczPtzZHvBI2UDEkI7uy6fTzMpsIYMYnw==",
        "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com;",
        "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;",
        "From": "Bing Zhao <bingz@nvidia.com>",
        "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>, <thomas@monjalon.net>",
        "CC": "<dev@dpdk.org>, <orika@nvidia.com>, <rasland@nvidia.com>",
        "Date": "Wed, 5 May 2021 09:40:48 +0300",
        "Message-ID": "<20210505064104.30248-2-bingz@nvidia.com>",
        "X-Mailer": "git-send-email 2.27.0",
        "In-Reply-To": "<20210505064104.30248-1-bingz@nvidia.com>",
        "References": "<20210427153811.11554-1-bingz@nvidia.com>\n <20210505064104.30248-1-bingz@nvidia.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Originating-IP": "[172.20.145.6]",
        "X-ClientProxiedBy": "HQMAIL105.nvidia.com (172.20.187.12) To\n HQMAIL107.nvidia.com (172.20.187.13)",
        "X-EOPAttributedMessage": "0",
        "X-MS-PublicTrafficType": "Email",
        "X-MS-Office365-Filtering-Correlation-Id": "7356238c-aea2-4c6c-a699-08d90f90d841",
        "X-MS-TrafficTypeDiagnostic": "BN7PR12MB2657:",
        "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr",
        "X-Microsoft-Antispam-PRVS": "\n <BN7PR12MB26576C5777983A1010879666D0599@BN7PR12MB2657.namprd12.prod.outlook.com>",
        "X-MS-Oob-TLC-OOBClassifiers": "OLM:5797;",
        "X-MS-Exchange-SenderADCheck": "1",
        "X-Microsoft-Antispam": "BCL:0;",
        "X-Microsoft-Antispam-Message-Info": "\n n/GkSSqFK34624pwQELXXlejbGZj5ItHY6wtPjQwLUJnWgYATyiUEG+mfY3XAWhjXOU/IRVQqTi4IQ1z3Trzkq4BWjXmBNmCpK4t40LwjlsT60Bh9Vwxke8u/fqtbdqFyeJJKfBpM/PSt1ewOQKZQXM9Nwnu0GXGF3srqAlal9lvdF8jbqC6TQ3jDLCjesyWOgVqwFnIRJUMr4J6zZqg9au53A2lUlxi/Y7vNsmuz77Ool2Vekg9mZBTh/HZeIw9WhScmyN+HA+filGPdskEFHHUh1a94NfGUSdR5aJtOW7tgGUTwdh19spVkQIbiPL/ZX1JXb6xZmIsf0ASiJBQINUaKUv/qQSfDFcUTWnIXGBp0eUmLC7TOmBR0ezUArSWI4WRv5L1ZNhx5VRuFWOKytp9vIpsSaKksjee/+bcHJTfbudUknml24zvlcSjMLOGlny51fASPQmzIbfkWMR44jboTnF7uKe7ThikJ+0DWtxTCQUrSHEc2b1mYhNpIXB+pCXPiahSw9BEn37bJVs5qQRZ4we428Dz1KHlIjdW51v369/NKT0Wy6hQMULscDepWZoHh96YB/cF0cUtTux7SjBcDHrPqEmci1mLla9/j4L0RYzynX+ahQTYug493fU6nHr7bYiD1tITxCOl6eDkQhCXn3RZkJcr4/kHjyocKVw=",
        "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(396003)(376002)(39860400002)(346002)(136003)(46966006)(36840700001)(1076003)(186003)(36756003)(82740400003)(110136005)(6666004)(356005)(54906003)(4326008)(426003)(8676002)(16526019)(2616005)(5660300002)(6286002)(82310400003)(47076005)(36860700001)(36906005)(107886003)(83380400001)(70206006)(70586007)(7696005)(86362001)(2906002)(7636003)(336012)(55016002)(316002)(478600001)(26005)(8936002);\n DIR:OUT; SFP:1101;",
        "X-OriginatorOrg": "Nvidia.com",
        "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "05 May 2021 06:41:42.6374 (UTC)",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 7356238c-aea2-4c6c-a699-08d90f90d841",
        "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]",
        "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT041.eop-nam11.prod.protection.outlook.com",
        "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous",
        "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN7PR12MB2657",
        "Subject": "[dpdk-dev] [PATCH v3 01/17] common/mlx5: add connection tracking\n object definition",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The structures of ASO connection tracking offload object are added\nbased on the definitions in the PRM. One CT object context will be\nloaded into the cache completely in a reversed order of dwords. The\nvalid bit should be the MSB of the last dword. This is used for the\nconntrack context creation and update, as well as for the query.\n\nThe capabilities 2 (HCA_CAP_2) layout is also added. The connection\ntracking related capabilities could be queried via the HCA_CAP_2.\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 85 ++++++++++++++++++++++++++++++++++\n 1 file changed, 85 insertions(+)",
    "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex efa5ae67bf..4da89d3379 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -1119,6 +1119,7 @@ enum {\n \tMLX5_GET_HCA_CAP_OP_MOD_ROCE = 0x4 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE = 0x7 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION = 0x13 << 1,\n+\tMLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 = 0x20 << 1,\n };\n \n #define MLX5_GENERAL_OBJ_TYPES_CAP_VIRTQ_NET_Q \\\n@@ -1661,6 +1662,29 @@ struct mlx5_ifc_flow_table_nic_cap_bits {\n \tstruct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties;\n };\n \n+struct mlx5_ifc_cmd_hca_cap_2_bits {\n+\tu8 reserved_at_0[0x80]; /* End of DW4. */\n+\tu8 reserved_at_80[0xb];\n+\tu8 log_max_num_reserved_qpn[0x5];\n+\tu8 reserved_at_90[0x3];\n+\tu8 log_reserved_qpn_granularity[0x5];\n+\tu8 reserved_at_98[0x3];\n+\tu8 log_reserved_qpn_max_alloc[0x5]; /* End of DW5. */\n+\tu8 max_reformat_insert_size[0x8];\n+\tu8 max_reformat_insert_offset[0x8];\n+\tu8 max_reformat_remove_size[0x8];\n+\tu8 max_reformat_remove_offset[0x8]; /* End of DW6. */\n+\tu8 aso_conntrack_reg_id[0x8];\n+\tu8 reserved_at_c8[0x3];\n+\tu8 log_conn_track_granularity[0x5];\n+\tu8 reserved_at_d0[0x3];\n+\tu8 log_conn_track_max_alloc[0x5];\n+\tu8 reserved_at_d8[0x3];\n+\tu8 log_max_conn_track_offload[0x5];\n+\tu8 reserved_at_e0[0x20]; /* End of DW7. */\n+\tu8 reserved_at_100[0x700];\n+};\n+\n union mlx5_ifc_hca_cap_union_bits {\n \tstruct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;\n \tstruct mlx5_ifc_per_protocol_networking_offload_caps_bits\n@@ -2599,6 +2623,67 @@ struct mlx5_ifc_create_flow_meter_aso_in_bits {\n \tstruct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;\n \tstruct mlx5_ifc_flow_meter_aso_bits flow_meter_aso;\n };\n+\n+struct mlx5_ifc_tcp_window_params_bits {\n+\tu8 max_ack[0x20];\n+\tu8 max_win[0x20];\n+\tu8 reply_end[0x20];\n+\tu8 sent_end[0x20];\n+};\n+\n+struct mlx5_ifc_conn_track_aso_bits {\n+\tstruct mlx5_ifc_tcp_window_params_bits reply_dir; /* End of DW3. */\n+\tstruct mlx5_ifc_tcp_window_params_bits original_dir; /* End of DW7. */\n+\tu8 last_end[0x20]; /* End of DW8. */\n+\tu8 last_ack[0x20]; /* End of DW9. */\n+\tu8 last_seq[0x20]; /* End of DW10. */\n+\tu8 last_win[0x10];\n+\tu8 reserved_at_170[0xa];\n+\tu8 last_dir[0x1];\n+\tu8 last_index[0x5]; /* End of DW11. */\n+\tu8 reserved_at_180[0x40]; /* End of DW13. */\n+\tu8 reply_direction_tcp_scale[0x4];\n+\tu8 reply_direction_tcp_close_initiated[0x1];\n+\tu8 reply_direction_tcp_liberal_enabled[0x1];\n+\tu8 reply_direction_tcp_data_unacked[0x1];\n+\tu8 reply_direction_tcp_max_ack[0x1];\n+\tu8 reserved_at_1c8[0x8];\n+\tu8 original_direction_tcp_scale[0x4];\n+\tu8 original_direction_tcp_close_initiated[0x1];\n+\tu8 original_direction_tcp_liberal_enabled[0x1];\n+\tu8 original_direction_tcp_data_unacked[0x1];\n+\tu8 original_direction_tcp_max_ack[0x1];\n+\tu8 reserved_at_1d8[0x8]; /* End of DW14. */\n+\tu8 valid[0x1];\n+\tu8 state[0x3];\n+\tu8 freeze_track[0x1];\n+\tu8 reserved_at_1e5[0xb];\n+\tu8 reserved_at_1f0[0x1];\n+\tu8 connection_assured[0x1];\n+\tu8 sack_permitted[0x1];\n+\tu8 challenged_acked[0x1];\n+\tu8 heartbeat[0x1];\n+\tu8 max_ack_window[0x3];\n+\tu8 reserved_at_1f8[0x1];\n+\tu8 retransmission_counter[0x3];\n+\tu8 retranmission_limit_exceeded[0x1];\n+\tu8 retranmission_limit[0x3]; /* End of DW15. */\n+};\n+\n+struct mlx5_ifc_conn_track_offload_bits {\n+\tu8 modify_field_select[0x40];\n+\tu8 reserved_at_40[0x40];\n+\tu8 reserved_at_80[0x8];\n+\tu8 conn_track_aso_access_pd[0x18];\n+\tu8 reserved_at_a0[0x160];\n+\tstruct mlx5_ifc_conn_track_aso_bits conn_track_aso;\n+};\n+\n+struct mlx5_ifc_create_conn_track_aso_in_bits {\n+\tstruct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;\n+\tstruct mlx5_ifc_conn_track_offload_bits conn_track_offload;\n+};\n+\n enum mlx5_access_aso_opc_mod {\n \tASO_OPC_MOD_IPSEC = 0x0,\n \tASO_OPC_MOD_CONNECTION_TRACKING = 0x1,\n",
    "prefixes": [
        "v3",
        "01/17"
    ]
}