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GET /api/patches/92666/?format=api
{ "id": 92666, "url": "http://patches.dpdk.org/api/patches/92666/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210503152238.2437-29-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210503152238.2437-29-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210503152238.2437-29-pbhagavatula@marvell.com", "date": "2021-05-03T15:22:31", "name": "[v4,28/34] event/cnxk: add TIM bucket operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f0bf07e8b2a77228bf70f911c17ed76b543f029a", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210503152238.2437-29-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 16799, "url": "http://patches.dpdk.org/api/series/16799/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16799", "date": "2021-05-03T15:22:03", "name": "Marvell CNXK Event device Driver", "version": 4, "mbox": "http://patches.dpdk.org/series/16799/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/92666/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/92666/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 51F43A0562;\n\tMon, 3 May 2021 17:26:16 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EEA7F4114E;\n\tMon, 3 May 2021 17:24:28 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 41B08411AF\n for <dev@dpdk.org>; Mon, 3 May 2021 17:24:27 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 143FAGSY032536 for <dev@dpdk.org>; Mon, 3 May 2021 08:24:26 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 38ad05heqh-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Mon, 03 May 2021 08:24:26 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Mon, 3 May 2021 08:24:23 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Mon, 3 May 2021 08:24:23 -0700", "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id 7D7E93F703F;\n Mon, 3 May 2021 08:24:22 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=T0tMmSSidllLXetzWsSTFI0Qo20G67rAo7pX5HkHgcE=;\n b=SgMN0n9i8Bmtv0qrGNMUVgSJn5N6VsRoL1O5sEBeuUy10Z25F7cx+ALU3LvGeO6U+AeD\n 3ztXTZs0JpqxKs7E0s7wC0lQKOITauIbQ8v/AXOXMBHwIyIFtMXFvoZr4aW0pvOtet/P\n IQvwr6juYOsb4PiN5qpukRohyyFcWkzfym3bauvaU0JoGNQmK63SkZuZ/kQeiBNpOV+Q\n cGwb5onmAtHcHOu8P/rdgpWG6ZvJRPXOHNJC4Pln0NBIryzTg+aFQVU5bM7qGrjOFvv+\n JA21gEpMgoUpEqUb+kVSdKhki96uztox55hJwIIYITrJDBfrG1rk35ngH+6nTVDKGu9V WQ==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "CC": "<dev@dpdk.org>", "Date": "Mon, 3 May 2021 20:52:31 +0530", "Message-ID": "<20210503152238.2437-29-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20210503152238.2437-1-pbhagavatula@marvell.com>", "References": "<20210430135336.2749-1-pbhagavatula@marvell.com>\n <20210503152238.2437-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "ysYcLKUKQIfmNy2_o9OFEL4e4qOg8IEF", "X-Proofpoint-ORIG-GUID": "ysYcLKUKQIfmNy2_o9OFEL4e4qOg8IEF", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761\n definitions=2021-05-03_10:2021-05-03,\n 2021-05-03 signatures=0", "Subject": "[dpdk-dev] [PATCH v4 28/34] event/cnxk: add TIM bucket operations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd TIM bucket operations used for event timer arm and cancel.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\n---\n drivers/event/cnxk/cnxk_tim_evdev.h | 30 +++++++\n drivers/event/cnxk/cnxk_tim_worker.c | 6 ++\n drivers/event/cnxk/cnxk_tim_worker.h | 123 +++++++++++++++++++++++++++\n drivers/event/cnxk/meson.build | 1 +\n 4 files changed, 160 insertions(+)\n create mode 100644 drivers/event/cnxk/cnxk_tim_worker.c\n create mode 100644 drivers/event/cnxk/cnxk_tim_worker.h", "diff": "diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h\nindex 9496634c8..f6895417a 100644\n--- a/drivers/event/cnxk/cnxk_tim_evdev.h\n+++ b/drivers/event/cnxk/cnxk_tim_evdev.h\n@@ -37,6 +37,36 @@\n #define CNXK_TIM_CHNK_SLOTS \"tim_chnk_slots\"\n #define CNXK_TIM_RINGS_LMT \"tim_rings_lmt\"\n \n+#define TIM_BUCKET_W1_S_CHUNK_REMAINDER (48)\n+#define TIM_BUCKET_W1_M_CHUNK_REMAINDER \\\n+\t((1ULL << (64 - TIM_BUCKET_W1_S_CHUNK_REMAINDER)) - 1)\n+#define TIM_BUCKET_W1_S_LOCK (40)\n+#define TIM_BUCKET_W1_M_LOCK \\\n+\t((1ULL << (TIM_BUCKET_W1_S_CHUNK_REMAINDER - TIM_BUCKET_W1_S_LOCK)) - 1)\n+#define TIM_BUCKET_W1_S_RSVD (35)\n+#define TIM_BUCKET_W1_S_BSK (34)\n+#define TIM_BUCKET_W1_M_BSK \\\n+\t((1ULL << (TIM_BUCKET_W1_S_RSVD - TIM_BUCKET_W1_S_BSK)) - 1)\n+#define TIM_BUCKET_W1_S_HBT (33)\n+#define TIM_BUCKET_W1_M_HBT \\\n+\t((1ULL << (TIM_BUCKET_W1_S_BSK - TIM_BUCKET_W1_S_HBT)) - 1)\n+#define TIM_BUCKET_W1_S_SBT (32)\n+#define TIM_BUCKET_W1_M_SBT \\\n+\t((1ULL << (TIM_BUCKET_W1_S_HBT - TIM_BUCKET_W1_S_SBT)) - 1)\n+#define TIM_BUCKET_W1_S_NUM_ENTRIES (0)\n+#define TIM_BUCKET_W1_M_NUM_ENTRIES \\\n+\t((1ULL << (TIM_BUCKET_W1_S_SBT - TIM_BUCKET_W1_S_NUM_ENTRIES)) - 1)\n+\n+#define TIM_BUCKET_SEMA (TIM_BUCKET_CHUNK_REMAIN)\n+\n+#define TIM_BUCKET_CHUNK_REMAIN \\\n+\t(TIM_BUCKET_W1_M_CHUNK_REMAINDER << TIM_BUCKET_W1_S_CHUNK_REMAINDER)\n+\n+#define TIM_BUCKET_LOCK (TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK)\n+\n+#define TIM_BUCKET_SEMA_WLOCK \\\n+\t(TIM_BUCKET_CHUNK_REMAIN | (1ull << TIM_BUCKET_W1_S_LOCK))\n+\n struct cnxk_tim_evdev {\n \tstruct roc_tim tim;\n \tstruct rte_eventdev *event_dev;\ndiff --git a/drivers/event/cnxk/cnxk_tim_worker.c b/drivers/event/cnxk/cnxk_tim_worker.c\nnew file mode 100644\nindex 000000000..49ee85245\n--- /dev/null\n+++ b/drivers/event/cnxk/cnxk_tim_worker.c\n@@ -0,0 +1,6 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cnxk_tim_evdev.h\"\n+#include \"cnxk_tim_worker.h\"\ndiff --git a/drivers/event/cnxk/cnxk_tim_worker.h b/drivers/event/cnxk/cnxk_tim_worker.h\nnew file mode 100644\nindex 000000000..d56e67360\n--- /dev/null\n+++ b/drivers/event/cnxk/cnxk_tim_worker.h\n@@ -0,0 +1,123 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef __CNXK_TIM_WORKER_H__\n+#define __CNXK_TIM_WORKER_H__\n+\n+#include \"cnxk_tim_evdev.h\"\n+\n+static inline uint8_t\n+cnxk_tim_bkt_fetch_lock(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_LOCK) & TIM_BUCKET_W1_M_LOCK;\n+}\n+\n+static inline int16_t\n+cnxk_tim_bkt_fetch_rem(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_CHUNK_REMAINDER) &\n+\t TIM_BUCKET_W1_M_CHUNK_REMAINDER;\n+}\n+\n+static inline int16_t\n+cnxk_tim_bkt_get_rem(struct cnxk_tim_bkt *bktp)\n+{\n+\treturn __atomic_load_n(&bktp->chunk_remainder, __ATOMIC_ACQUIRE);\n+}\n+\n+static inline void\n+cnxk_tim_bkt_set_rem(struct cnxk_tim_bkt *bktp, uint16_t v)\n+{\n+\t__atomic_store_n(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline void\n+cnxk_tim_bkt_sub_rem(struct cnxk_tim_bkt *bktp, uint16_t v)\n+{\n+\t__atomic_fetch_sub(&bktp->chunk_remainder, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint8_t\n+cnxk_tim_bkt_get_hbt(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_HBT) & TIM_BUCKET_W1_M_HBT;\n+}\n+\n+static inline uint8_t\n+cnxk_tim_bkt_get_bsk(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_BSK) & TIM_BUCKET_W1_M_BSK;\n+}\n+\n+static inline uint64_t\n+cnxk_tim_bkt_clr_bsk(struct cnxk_tim_bkt *bktp)\n+{\n+\t/* Clear everything except lock. */\n+\tconst uint64_t v = TIM_BUCKET_W1_M_LOCK << TIM_BUCKET_W1_S_LOCK;\n+\n+\treturn __atomic_fetch_and(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+}\n+\n+static inline uint64_t\n+cnxk_tim_bkt_fetch_sema_lock(struct cnxk_tim_bkt *bktp)\n+{\n+\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA_WLOCK,\n+\t\t\t\t __ATOMIC_ACQUIRE);\n+}\n+\n+static inline uint64_t\n+cnxk_tim_bkt_fetch_sema(struct cnxk_tim_bkt *bktp)\n+{\n+\treturn __atomic_fetch_add(&bktp->w1, TIM_BUCKET_SEMA, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint64_t\n+cnxk_tim_bkt_inc_lock(struct cnxk_tim_bkt *bktp)\n+{\n+\tconst uint64_t v = 1ull << TIM_BUCKET_W1_S_LOCK;\n+\n+\treturn __atomic_fetch_add(&bktp->w1, v, __ATOMIC_ACQUIRE);\n+}\n+\n+static inline void\n+cnxk_tim_bkt_dec_lock(struct cnxk_tim_bkt *bktp)\n+{\n+\t__atomic_fetch_sub(&bktp->lock, 1, __ATOMIC_RELEASE);\n+}\n+\n+static inline void\n+cnxk_tim_bkt_dec_lock_relaxed(struct cnxk_tim_bkt *bktp)\n+{\n+\t__atomic_fetch_sub(&bktp->lock, 1, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint32_t\n+cnxk_tim_bkt_get_nent(uint64_t w1)\n+{\n+\treturn (w1 >> TIM_BUCKET_W1_S_NUM_ENTRIES) &\n+\t TIM_BUCKET_W1_M_NUM_ENTRIES;\n+}\n+\n+static inline void\n+cnxk_tim_bkt_inc_nent(struct cnxk_tim_bkt *bktp)\n+{\n+\t__atomic_add_fetch(&bktp->nb_entry, 1, __ATOMIC_RELAXED);\n+}\n+\n+static inline void\n+cnxk_tim_bkt_add_nent(struct cnxk_tim_bkt *bktp, uint32_t v)\n+{\n+\t__atomic_add_fetch(&bktp->nb_entry, v, __ATOMIC_RELAXED);\n+}\n+\n+static inline uint64_t\n+cnxk_tim_bkt_clr_nent(struct cnxk_tim_bkt *bktp)\n+{\n+\tconst uint64_t v =\n+\t\t~(TIM_BUCKET_W1_M_NUM_ENTRIES << TIM_BUCKET_W1_S_NUM_ENTRIES);\n+\n+\treturn __atomic_and_fetch(&bktp->w1, v, __ATOMIC_ACQ_REL);\n+}\n+\n+#endif /* __CNXK_TIM_WORKER_H__ */\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex bd52cbc68..e665dfc72 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -16,6 +16,7 @@ sources = files('cn10k_worker.c',\n 'cnxk_eventdev.c',\n 'cnxk_eventdev_selftest.c',\n 'cnxk_eventdev_stats.c',\n+ 'cnxk_tim_worker.c',\n 'cnxk_tim_evdev.c',\n )\n \n", "prefixes": [ "v4", "28/34" ] }