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{
    "id": 92642,
    "url": "http://patches.dpdk.org/api/patches/92642/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210503152238.2437-5-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210503152238.2437-5-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210503152238.2437-5-pbhagavatula@marvell.com",
    "date": "2021-05-03T15:22:07",
    "name": "[v4,04/34] event/cnxk: add platform specific device probe",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "87bef524a098191941b5c014b77f4b821b2fa765",
    "submitter": {
        "id": 1183,
        "url": "http://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210503152238.2437-5-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 16799,
            "url": "http://patches.dpdk.org/api/series/16799/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16799",
            "date": "2021-05-03T15:22:03",
            "name": "Marvell CNXK Event device Driver",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/16799/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/92642/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/92642/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>",
        "CC": "<dev@dpdk.org>",
        "Date": "Mon, 3 May 2021 20:52:07 +0530",
        "Message-ID": "<20210503152238.2437-5-pbhagavatula@marvell.com>",
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        "References": "<20210430135336.2749-1-pbhagavatula@marvell.com>\n <20210503152238.2437-1-pbhagavatula@marvell.com>",
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        "Subject": "[dpdk-dev] [PATCH v4 04/34] event/cnxk: add platform specific\n device probe",
        "X-BeenThere": "dev@dpdk.org",
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        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd platform specific event device probe and remove, also add\nevent device info get function.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nSigned-off-by: Shijith Thotton <sthotton@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 101 +++++++++++++++++++++++++++\n drivers/event/cnxk/cn9k_eventdev.c  | 102 ++++++++++++++++++++++++++++\n drivers/event/cnxk/cnxk_eventdev.h  |   2 +\n drivers/event/cnxk/meson.build      |   5 +-\n 4 files changed, 209 insertions(+), 1 deletion(-)\n create mode 100644 drivers/event/cnxk/cn10k_eventdev.c\n create mode 100644 drivers/event/cnxk/cn9k_eventdev.c",
    "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nnew file mode 100644\nindex 000000000..1216acaad\n--- /dev/null\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -0,0 +1,101 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cnxk_eventdev.h\"\n+\n+static void\n+cn10k_sso_set_rsrc(void *arg)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\n+\tdev->max_event_ports = dev->sso.max_hws;\n+\tdev->max_event_queues =\n+\t\tdev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?\n+\t\t\t      RTE_EVENT_MAX_QUEUES_PER_DEV :\n+\t\t\t      dev->sso.max_hwgrp;\n+}\n+\n+static void\n+cn10k_sso_info_get(struct rte_eventdev *event_dev,\n+\t\t   struct rte_event_dev_info *dev_info)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\n+\tdev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN10K_PMD);\n+\tcnxk_sso_info_get(dev, dev_info);\n+}\n+\n+static struct rte_eventdev_ops cn10k_sso_dev_ops = {\n+\t.dev_infos_get = cn10k_sso_info_get,\n+};\n+\n+static int\n+cn10k_sso_init(struct rte_eventdev *event_dev)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tint rc;\n+\n+\tif (RTE_CACHE_LINE_SIZE != 64) {\n+\t\tplt_err(\"Driver not compiled for CN9K\");\n+\t\treturn -EFAULT;\n+\t}\n+\n+\trc = roc_plt_init();\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to initialize platform model\");\n+\t\treturn rc;\n+\t}\n+\n+\tevent_dev->dev_ops = &cn10k_sso_dev_ops;\n+\t/* For secondary processes, the primary has done all the work */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\trc = cnxk_sso_init(event_dev);\n+\tif (rc < 0)\n+\t\treturn rc;\n+\n+\tcn10k_sso_set_rsrc(cnxk_sso_pmd_priv(event_dev));\n+\tif (!dev->max_event_ports || !dev->max_event_queues) {\n+\t\tplt_err(\"Not enough eventdev resource queues=%d ports=%d\",\n+\t\t\tdev->max_event_queues, dev->max_event_ports);\n+\t\tcnxk_sso_fini(event_dev);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tplt_sso_dbg(\"Initializing %s max_queues=%d max_ports=%d\",\n+\t\t    event_dev->data->name, dev->max_event_queues,\n+\t\t    dev->max_event_ports);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_event_pmd_pci_probe(pci_drv, pci_dev,\n+\t\t\t\t       sizeof(struct cnxk_sso_evdev),\n+\t\t\t\t       cn10k_sso_init);\n+}\n+\n+static const struct rte_pci_id cn10k_pci_sso_map[] = {\n+\tCNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),\n+\tCNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),\n+\tCNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),\n+\tCNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),\n+\t{\n+\t\t.vendor_id = 0,\n+\t},\n+};\n+\n+static struct rte_pci_driver cn10k_pci_sso = {\n+\t.id_table = cn10k_pci_sso_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,\n+\t.probe = cn10k_sso_probe,\n+\t.remove = cnxk_sso_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(event_cn10k, cn10k_pci_sso);\n+RTE_PMD_REGISTER_PCI_TABLE(event_cn10k, cn10k_pci_sso_map);\n+RTE_PMD_REGISTER_KMOD_DEP(event_cn10k, \"vfio-pci\");\ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nnew file mode 100644\nindex 000000000..988d2425f\n--- /dev/null\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -0,0 +1,102 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cnxk_eventdev.h\"\n+\n+#define CN9K_DUAL_WS_NB_WS\t    2\n+#define CN9K_DUAL_WS_PAIR_ID(x, id) (((x)*CN9K_DUAL_WS_NB_WS) + id)\n+\n+static void\n+cn9k_sso_set_rsrc(void *arg)\n+{\n+\tstruct cnxk_sso_evdev *dev = arg;\n+\n+\tif (dev->dual_ws)\n+\t\tdev->max_event_ports = dev->sso.max_hws / CN9K_DUAL_WS_NB_WS;\n+\telse\n+\t\tdev->max_event_ports = dev->sso.max_hws;\n+\tdev->max_event_queues =\n+\t\tdev->sso.max_hwgrp > RTE_EVENT_MAX_QUEUES_PER_DEV ?\n+\t\t\t      RTE_EVENT_MAX_QUEUES_PER_DEV :\n+\t\t\t      dev->sso.max_hwgrp;\n+}\n+\n+static void\n+cn9k_sso_info_get(struct rte_eventdev *event_dev,\n+\t\t  struct rte_event_dev_info *dev_info)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\n+\tdev_info->driver_name = RTE_STR(EVENTDEV_NAME_CN9K_PMD);\n+\tcnxk_sso_info_get(dev, dev_info);\n+}\n+\n+static struct rte_eventdev_ops cn9k_sso_dev_ops = {\n+\t.dev_infos_get = cn9k_sso_info_get,\n+};\n+\n+static int\n+cn9k_sso_init(struct rte_eventdev *event_dev)\n+{\n+\tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tint rc;\n+\n+\tif (RTE_CACHE_LINE_SIZE != 128) {\n+\t\tplt_err(\"Driver not compiled for CN9K\");\n+\t\treturn -EFAULT;\n+\t}\n+\n+\trc = roc_plt_init();\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to initialize platform model\");\n+\t\treturn rc;\n+\t}\n+\n+\tevent_dev->dev_ops = &cn9k_sso_dev_ops;\n+\t/* For secondary processes, the primary has done all the work */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\trc = cnxk_sso_init(event_dev);\n+\tif (rc < 0)\n+\t\treturn rc;\n+\n+\tcn9k_sso_set_rsrc(cnxk_sso_pmd_priv(event_dev));\n+\tif (!dev->max_event_ports || !dev->max_event_queues) {\n+\t\tplt_err(\"Not enough eventdev resource queues=%d ports=%d\",\n+\t\t\tdev->max_event_queues, dev->max_event_ports);\n+\t\tcnxk_sso_fini(event_dev);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tplt_sso_dbg(\"Initializing %s max_queues=%d max_ports=%d\",\n+\t\t    event_dev->data->name, dev->max_event_queues,\n+\t\t    dev->max_event_ports);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn9k_sso_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n+{\n+\treturn rte_event_pmd_pci_probe(\n+\t\tpci_drv, pci_dev, sizeof(struct cnxk_sso_evdev), cn9k_sso_init);\n+}\n+\n+static const struct rte_pci_id cn9k_pci_sso_map[] = {\n+\t{\n+\t\t.vendor_id = 0,\n+\t},\n+};\n+\n+static struct rte_pci_driver cn9k_pci_sso = {\n+\t.id_table = cn9k_pci_sso_map,\n+\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_NEED_IOVA_AS_VA,\n+\t.probe = cn9k_sso_probe,\n+\t.remove = cnxk_sso_remove,\n+};\n+\n+RTE_PMD_REGISTER_PCI(event_cn9k, cn9k_pci_sso);\n+RTE_PMD_REGISTER_PCI_TABLE(event_cn9k, cn9k_pci_sso_map);\n+RTE_PMD_REGISTER_KMOD_DEP(event_cn9k, \"vfio-pci\");\ndiff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h\nindex 9745bfd3e..6bdf0b347 100644\n--- a/drivers/event/cnxk/cnxk_eventdev.h\n+++ b/drivers/event/cnxk/cnxk_eventdev.h\n@@ -25,6 +25,8 @@ struct cnxk_sso_evdev {\n \tuint32_t min_dequeue_timeout_ns;\n \tuint32_t max_dequeue_timeout_ns;\n \tint32_t max_num_events;\n+\t/* CN9K */\n+\tuint8_t dual_ws;\n } __rte_cache_aligned;\n \n static inline struct cnxk_sso_evdev *\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex fbe245fca..22eb28345 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -8,6 +8,9 @@ if not is_linux or not dpdk_conf.get('RTE_ARCH_64')\n         subdir_done()\n endif\n \n-sources = files('cnxk_eventdev.c')\n+sources = files('cn10k_eventdev.c',\n+                'cn9k_eventdev.c',\n+                'cnxk_eventdev.c',\n+                )\n \n deps += ['bus_pci', 'common_cnxk']\n",
    "prefixes": [
        "v4",
        "04/34"
    ]
}