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GET /api/patches/92099/?format=api
{ "id": 92099, "url": "http://patches.dpdk.org/api/patches/92099/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210424060337.2824837-5-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210424060337.2824837-5-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210424060337.2824837-5-qi.z.zhang@intel.com", "date": "2021-04-24T06:03:37", "name": "[4/4] common/iavf: use BIT() macro for offload/cap bits", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "9dffa64510a36038d0c9bb159d79cedda77bb035", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210424060337.2824837-5-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 16641, "url": "http://patches.dpdk.org/api/series/16641/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16641", "date": "2021-04-24T06:03:33", "name": "common/iavf: update virtchnl", "version": 1, "mbox": "http://patches.dpdk.org/series/16641/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/92099/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/92099/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6EDD3A0547;\n\tSat, 24 Apr 2021 08:00:23 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 587F741118;\n\tSat, 24 Apr 2021 08:00:06 +0200 (CEST)", "from mga06.intel.com (mga06.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 24FC44112D\n for <dev@dpdk.org>; Sat, 24 Apr 2021 08:00:04 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Apr 2021 23:00:04 -0700", "from dpdk51.sh.intel.com ([10.67.111.142])\n by fmsmga008.fm.intel.com with ESMTP; 23 Apr 2021 23:00:01 -0700" ], "IronPort-SDR": [ "\n Toy9yyUESOvvaNvwDPqdV0NZFEMDidGVs9uC6Rs7hgaM4PLO5V5oGdFoeWcEHWud5Dy3UpS0vk\n doDKCLftYOcQ==", "\n /dcrJjVV2ZxMPh+NX9bvq/Fc5Y6Wd/ZWUjOS+9kyhIyAcprjnQR5e3fZ2sHmIVVga21mNl3F2I\n tneaiYtdb2CQ==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9963\"; a=\"257470331\"", "E=Sophos;i=\"5.82,247,1613462400\"; d=\"scan'208\";a=\"257470331\"", "E=Sophos;i=\"5.82,247,1613462400\"; d=\"scan'208\";a=\"421999491\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "beilei.xing@intel.com", "Cc": "haiyue.wang@intel.com, dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Brett Creeley <brett.creeley@intel.com>", "Date": "Sat, 24 Apr 2021 14:03:37 +0800", "Message-Id": "<20210424060337.2824837-5-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20210424060337.2824837-1-qi.z.zhang@intel.com>", "References": "<20210424060337.2824837-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 4/4] common/iavf: use BIT() macro for offload/cap\n bits", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Currently raw hex values are used to define specific bits for each\noffload/capability in virtchnl.h. The can and has led to duplicate\ndefined bits. Fix this by using the BIT() macro so it's\nimmediately obvious which bits are used/available.\n\nSigned-off-by: Brett Creeley <brett.creeley@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/common/iavf/virtchnl.h | 55 +++++++++++++++++-----------------\n 1 file changed, 27 insertions(+), 28 deletions(-)", "diff": "diff --git a/drivers/common/iavf/virtchnl.h b/drivers/common/iavf/virtchnl.h\nindex 0772c28527..09d4c86550 100644\n--- a/drivers/common/iavf/virtchnl.h\n+++ b/drivers/common/iavf/virtchnl.h\n@@ -372,35 +372,34 @@ VIRTCHNL_CHECK_STRUCT_LEN(16, virtchnl_vsi_resource);\n * VIRTCHNL_VF_OFFLOAD_L2 flag is inclusive of base mode L2 offloads including\n * TX/RX Checksum offloading and TSO for non-tunnelled packets.\n */\n-#define VIRTCHNL_VF_OFFLOAD_L2\t\t\t0x00000001\n-#define VIRTCHNL_VF_OFFLOAD_IWARP\t\t0x00000002\n-#define VIRTCHNL_VF_OFFLOAD_RSVD\t\t0x00000004\n-#define VIRTCHNL_VF_OFFLOAD_RSS_AQ\t\t0x00000008\n-#define VIRTCHNL_VF_OFFLOAD_RSS_REG\t\t0x00000010\n-#define VIRTCHNL_VF_OFFLOAD_WB_ON_ITR\t\t0x00000020\n-#define VIRTCHNL_VF_OFFLOAD_REQ_QUEUES\t\t0x00000040\n+#define VIRTCHNL_VF_OFFLOAD_L2\t\t\tBIT(0)\n+#define VIRTCHNL_VF_OFFLOAD_IWARP\t\tBIT(1)\n+#define VIRTCHNL_VF_OFFLOAD_RSVD\t\tBIT(2)\n+#define VIRTCHNL_VF_OFFLOAD_RSS_AQ\t\tBIT(3)\n+#define VIRTCHNL_VF_OFFLOAD_RSS_REG\t\tBIT(4)\n+#define VIRTCHNL_VF_OFFLOAD_WB_ON_ITR\t\tBIT(5)\n+#define VIRTCHNL_VF_OFFLOAD_REQ_QUEUES\t\tBIT(6)\n /* used to negotiate communicating link speeds in Mbps */\n-#define VIRTCHNL_VF_CAP_ADV_LINK_SPEED\t\t0x00000080\n-\t/* 0X00000100 is reserved */\n-#define VIRTCHNL_VF_LARGE_NUM_QPAIRS\t\t0x00000200\n-#define VIRTCHNL_VF_OFFLOAD_CRC\t\t\t0x00000400\n-#define VIRTCHNL_VF_OFFLOAD_VLAN_V2\t\t0x00008000\n-#define VIRTCHNL_VF_OFFLOAD_VLAN\t\t0x00010000\n-#define VIRTCHNL_VF_OFFLOAD_RX_POLLING\t\t0x00020000\n-#define VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2\t0x00040000\n-#define VIRTCHNL_VF_OFFLOAD_RSS_PF\t\t0X00080000\n-#define VIRTCHNL_VF_OFFLOAD_ENCAP\t\t0X00100000\n-#define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM\t\t0X00200000\n-#define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM\t0X00400000\n-#define VIRTCHNL_VF_OFFLOAD_ADQ\t\t\t0X00800000\n-#define VIRTCHNL_VF_OFFLOAD_ADQ_V2\t\t0X01000000\n-#define VIRTCHNL_VF_OFFLOAD_USO\t\t\t0X02000000\n-#define VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC\t0X04000000\n-#define VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF\t\t0X08000000\n-#define VIRTCHNL_VF_OFFLOAD_FDIR_PF\t\t0X10000000\n-\t/* 0X20000000 is reserved */\n-#define VIRTCHNL_VF_CAP_DCF\t\t\t0X40000000\n-\t/* 0X80000000 is reserved */\n+#define VIRTCHNL_VF_CAP_ADV_LINK_SPEED\t\tBIT(7)\n+\t/* BIT(8) is reserved */\n+#define VIRTCHNL_VF_LARGE_NUM_QPAIRS\t\tBIT(9)\n+#define VIRTCHNL_VF_OFFLOAD_CRC\t\t\tBIT(10)\n+#define VIRTCHNL_VF_OFFLOAD_VLAN_V2\t\tBIT(15)\n+#define VIRTCHNL_VF_OFFLOAD_VLAN\t\tBIT(16)\n+#define VIRTCHNL_VF_OFFLOAD_RX_POLLING\t\tBIT(17)\n+#define VIRTCHNL_VF_OFFLOAD_RSS_PCTYPE_V2\tBIT(18)\n+#define VIRTCHNL_VF_OFFLOAD_RSS_PF\t\tBIT(19)\n+#define VIRTCHNL_VF_OFFLOAD_ENCAP\t\tBIT(20)\n+#define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM\t\tBIT(21)\n+#define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM\tBIT(22)\n+#define VIRTCHNL_VF_OFFLOAD_ADQ\t\t\tBIT(23)\n+#define VIRTCHNL_VF_OFFLOAD_ADQ_V2\t\tBIT(24)\n+#define VIRTCHNL_VF_OFFLOAD_USO\t\t\tBIT(25)\n+#define VIRTCHNL_VF_OFFLOAD_RX_FLEX_DESC\tBIT(26)\n+#define VIRTCHNL_VF_OFFLOAD_ADV_RSS_PF\t\tBIT(27)\n+#define VIRTCHNL_VF_OFFLOAD_FDIR_PF\t\tBIT(28)\n+#define VIRTCHNL_VF_CAP_DCF\t\t\tBIT(30)\n+\t/* BIT(31) is reserved */\n \n #define VF_BASE_MODE_OFFLOADS (VIRTCHNL_VF_OFFLOAD_L2 | \\\n \t\t\t VIRTCHNL_VF_OFFLOAD_VLAN | \\\n", "prefixes": [ "4/4" ] }