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GET /api/patches/92081/?format=api
http://patches.dpdk.org/api/patches/92081/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210423114001.174723-4-haiyue.wang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210423114001.174723-4-haiyue.wang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210423114001.174723-4-haiyue.wang@intel.com", "date": "2021-04-23T11:40:01", "name": "[v3,3/3] net/i40e: enable PCI bus master after reset", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8d745659397bb2ab1e86893e65eb425ab655e5ed", "submitter": { "id": 1044, "url": "http://patches.dpdk.org/api/people/1044/?format=api", "name": "Wang, Haiyue", "email": "haiyue.wang@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210423114001.174723-4-haiyue.wang@intel.com/mbox/", "series": [ { "id": 16634, "url": "http://patches.dpdk.org/api/series/16634/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16634", "date": "2021-04-23T11:39:58", "name": "fix PF reset causes VF memory request failure", "version": 3, "mbox": "http://patches.dpdk.org/series/16634/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/92081/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/92081/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 08FF9A0548;\n\tFri, 23 Apr 2021 14:06:31 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9A33641DFC;\n\tFri, 23 Apr 2021 14:06:19 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id ABFDD41DF3\n for <dev@dpdk.org>; Fri, 23 Apr 2021 14:06:15 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Apr 2021 05:06:15 -0700", "from npg-dpdk-haiyue-2.sh.intel.com ([10.67.119.63])\n by orsmga008.jf.intel.com with ESMTP; 23 Apr 2021 05:06:13 -0700" ], "IronPort-SDR": [ "\n Q8jlESCxKm4hkUoKoA/ZPeZp3St769XMuhauwKkUCzWd2Pz5YHVbHqDbPUye5GM67V+blMkNwR\n f7XlovdQMG3A==", "\n 42Z50DFhK0Au675a84zWVhubbtZPylagksgZGz29uSAnsHAfQ23QjwtiWI/CyNKCfvirgG1LpH\n ZzLGEZMFQrOg==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,9962\"; a=\"183538021\"", "E=Sophos;i=\"5.82,245,1613462400\"; d=\"scan'208\";a=\"183538021\"", "E=Sophos;i=\"5.82,245,1613462400\"; d=\"scan'208\";a=\"428359991\"" ], "X-ExtLoop1": "1", "From": "Haiyue Wang <haiyue.wang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, liang-min.wang@intel.com,\n Haiyue Wang <haiyue.wang@intel.com>, Beilei Xing <beilei.xing@intel.com>,\n Jeff Guo <jia.guo@intel.com>", "Date": "Fri, 23 Apr 2021 19:40:01 +0800", "Message-Id": "<20210423114001.174723-4-haiyue.wang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20210423114001.174723-1-haiyue.wang@intel.com>", "References": "<20210421050243.130585-1-haiyue.wang@intel.com>\n <20210423114001.174723-1-haiyue.wang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v3 3/3] net/i40e: enable PCI bus master after\n reset", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The VF reset can be triggerred by the PF reset event, in this case, the\nPCI bus master will be cleared, then the VF is not allowed to issue any\nMemory or I/O Requests.\n\nSo after the reset event is detected, always enable the PCI bus master.\n\nAnd align the VF reset event handling in device close module as the AVF\ndriver does.\n\nSigned-off-by: Haiyue Wang <haiyue.wang@intel.com>\nTested-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/i40e/i40e_ethdev_vf.c | 7 ++++++-\n 1 file changed, 6 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c\nindex 3c258ba7c..4f1d04eb2 100644\n--- a/drivers/net/i40e/i40e_ethdev_vf.c\n+++ b/drivers/net/i40e/i40e_ethdev_vf.c\n@@ -1212,7 +1212,6 @@ i40evf_check_vf_reset_done(struct rte_eth_dev *dev)\n \tif (i >= MAX_RESET_WAIT_CNT)\n \t\treturn -1;\n \n-\tvf->vf_reset = false;\n \tvf->pend_msg &= ~PFMSG_RESET_IMPENDING;\n \n \treturn 0;\n@@ -1391,6 +1390,7 @@ i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,\n \tswitch (pf_msg->event) {\n \tcase VIRTCHNL_EVENT_RESET_IMPENDING:\n \t\tPMD_DRV_LOG(DEBUG, \"VIRTCHNL_EVENT_RESET_IMPENDING event\");\n+\t\tvf->vf_reset = true;\n \t\trte_eth_dev_callback_process(dev,\n \t\t\t\tRTE_ETH_EVENT_INTR_RESET, NULL);\n \t\tbreak;\n@@ -2487,6 +2487,11 @@ i40evf_dev_close(struct rte_eth_dev *dev)\n \ti40e_shutdown_adminq(hw);\n \ti40evf_disable_irq0(hw);\n \n+\tif (vf->vf_reset)\n+\t\trte_pci_enable_bus_master(RTE_ETH_DEV_TO_PCI(dev));\n+\n+\tvf->vf_reset = false;\n+\n \trte_free(vf->vf_res);\n \tvf->vf_res = NULL;\n \trte_free(vf->aq_resp);\n", "prefixes": [ "v3", "3/3" ] }{ "id": 92081, "url": "