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Update a patch.

GET /api/patches/92057/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 92057,
    "url": "http://patches.dpdk.org/api/patches/92057/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210423074203.948915-2-yuying.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210423074203.948915-2-yuying.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210423074203.948915-2-yuying.zhang@intel.com",
    "date": "2021-04-23T07:42:03",
    "name": "[v2,2/2] net/ice: clean redundant macro definition of filters",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "e517193505bf1d04673ad99047250e862a7390a3",
    "submitter": {
        "id": 1844,
        "url": "http://patches.dpdk.org/api/people/1844/?format=api",
        "name": "Zhang, Yuying",
        "email": "yuying.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210423074203.948915-2-yuying.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 16621,
            "url": "http://patches.dpdk.org/api/series/16621/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16621",
            "date": "2021-04-23T07:42:02",
            "name": "[v2,1/2] net/ice: refactor input set fields for switch filter",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/16621/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/92057/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/92057/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5B960A0548;\n\tFri, 23 Apr 2021 09:53:25 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5986341DCA;\n\tFri, 23 Apr 2021 09:53:19 +0200 (CEST)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id D4411416FF\n for <dev@dpdk.org>; Fri, 23 Apr 2021 09:53:16 +0200 (CEST)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Apr 2021 00:53:16 -0700",
            "from dpdk-yyzhang2.sh.intel.com ([10.67.117.129])\n by fmsmga002.fm.intel.com with ESMTP; 23 Apr 2021 00:53:14 -0700"
        ],
        "IronPort-SDR": [
            "\n hX3nnqoR7twhfb6PJjqZe5Ea9O8h0QIm7f0XRbJ2ysQ5dwCd2XnHb2AqgG6vQXlKm7uFnViUTo\n 2fxqXrUTeQJA==",
            "\n TpOwyXU80Z8ncModATSq37ifOUYfgOFkziUwmrxyOYNnbf0gjMtfKclySVHFz7x9tI70C+oI/8\n 0iwyx0dB1Svw=="
        ],
        "X-IronPort-AV": [
            "E=McAfee;i=\"6200,9189,9962\"; a=\"281360800\"",
            "E=Sophos;i=\"5.82,245,1613462400\"; d=\"scan'208\";a=\"281360800\"",
            "E=Sophos;i=\"5.82,245,1613462400\"; d=\"scan'208\";a=\"456127577\""
        ],
        "X-ExtLoop1": "1",
        "From": "Yuying Zhang <yuying.zhang@intel.com>",
        "To": "dev@dpdk.org,\n\tqi.z.zhang@intel.com,\n\thaiyue.wang@intel.com",
        "Cc": "junfeng.guo@intel.com, Zhirun.Yan@intel.com,\n Yuying Zhang <yuying.zhang@intel.com>",
        "Date": "Fri, 23 Apr 2021 07:42:03 +0000",
        "Message-Id": "<20210423074203.948915-2-yuying.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20210423074203.948915-1-yuying.zhang@intel.com>",
        "References": "<20210422100541.935478-1-yuying.zhang@intel.com>\n <20210423074203.948915-1-yuying.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v2 2/2] net/ice: clean redundant macro definition\n of filters",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The input set has been divided into two parts to distinguish\ninner and outer field. ICE_INSET_TUN_* is the same as non tunnel\nmacro definition. Clean redundant ICE_INSET_TUN_* codes.\n\nSigned-off-by: Yuying Zhang <yuying.zhang@intel.com>\n---\n drivers/net/ice/ice_fdir_filter.c   | 22 +++++------\n drivers/net/ice/ice_generic_flow.h  | 61 ++---------------------------\n drivers/net/ice/ice_switch_filter.c | 16 ++++----\n 3 files changed, 22 insertions(+), 77 deletions(-)",
    "diff": "diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex 3b8ea32b1a..ad2dc40815 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -72,7 +72,7 @@\n \n #define ICE_FDIR_INSET_ETH_IPV4_VXLAN (\\\n \tICE_FDIR_INSET_ETH | ICE_FDIR_INSET_ETH_IPV4 | \\\n-\tICE_INSET_TUN_VXLAN_VNI)\n+\tICE_INSET_VXLAN_VNI)\n \n #define ICE_FDIR_INSET_IPV4_GTPU (\\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_GTPU_TEID)\n@@ -893,17 +893,17 @@ ice_fdir_input_set_parse(uint64_t inset, enum ice_flow_field *field)\n \t\t{ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},\n \t\t{ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},\n \t\t{ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},\n-\t\t{ICE_INSET_TUN_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},\n-\t\t{ICE_INSET_TUN_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},\n-\t\t{ICE_INSET_TUN_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},\n-\t\t{ICE_INSET_TUN_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},\n-\t\t{ICE_INSET_TUN_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},\n-\t\t{ICE_INSET_TUN_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},\n-\t\t{ICE_INSET_TUN_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},\n-\t\t{ICE_INSET_TUN_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},\n+\t\t{ICE_INSET_IPV4_SRC, ICE_FLOW_FIELD_IDX_IPV4_SA},\n+\t\t{ICE_INSET_IPV4_DST, ICE_FLOW_FIELD_IDX_IPV4_DA},\n+\t\t{ICE_INSET_TCP_SRC_PORT, ICE_FLOW_FIELD_IDX_TCP_SRC_PORT},\n+\t\t{ICE_INSET_TCP_DST_PORT, ICE_FLOW_FIELD_IDX_TCP_DST_PORT},\n+\t\t{ICE_INSET_UDP_SRC_PORT, ICE_FLOW_FIELD_IDX_UDP_SRC_PORT},\n+\t\t{ICE_INSET_UDP_DST_PORT, ICE_FLOW_FIELD_IDX_UDP_DST_PORT},\n+\t\t{ICE_INSET_SCTP_SRC_PORT, ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT},\n+\t\t{ICE_INSET_SCTP_DST_PORT, ICE_FLOW_FIELD_IDX_SCTP_DST_PORT},\n \t\t{ICE_INSET_GTPU_TEID, ICE_FLOW_FIELD_IDX_GTPU_IP_TEID},\n \t\t{ICE_INSET_GTPU_QFI, ICE_FLOW_FIELD_IDX_GTPU_EH_QFI},\n-\t\t{ICE_INSET_TUN_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI},\n+\t\t{ICE_INSET_VXLAN_VNI, ICE_FLOW_FIELD_IDX_VXLAN_VNI},\n \t};\n \n \tfor (i = 0, j = 0; i < RTE_DIM(ice_inset_map); i++) {\n@@ -1916,7 +1916,7 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,\n \t\t\t}\n \n \t\t\tif (vxlan_mask->hdr.vx_vni)\n-\t\t\t\t*input_set |= ICE_INSET_TUN_VXLAN_VNI;\n+\t\t\t\t*input_set |= ICE_INSET_VXLAN_VNI;\n \n \t\t\tfilter->input.vxlan_data.vni = vxlan_spec->hdr.vx_vni;\n \ndiff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h\nindex a4d0b6671d..b7634b9662 100644\n--- a/drivers/net/ice/ice_generic_flow.h\n+++ b/drivers/net/ice/ice_generic_flow.h\n@@ -92,64 +92,9 @@\n \n /* tunnel */\n \n-#define ICE_INSET_TUN_SMAC \\\n-\t(ICE_PROT_MAC | ICE_SMAC)\n-#define ICE_INSET_TUN_DMAC \\\n-\t(ICE_PROT_MAC | ICE_DMAC)\n-\n-#define ICE_INSET_TUN_IPV4_SRC \\\n-\t(ICE_PROT_IPV4 | ICE_IP_SRC)\n-#define ICE_INSET_TUN_IPV4_DST \\\n-\t(ICE_PROT_IPV4 | ICE_IP_DST)\n-#define ICE_INSET_TUN_IPV4_TTL \\\n-\t(ICE_PROT_IPV4 | ICE_IP_TTL)\n-#define ICE_INSET_TUN_IPV4_PROTO \\\n-\t(ICE_PROT_IPV4 | ICE_IP_PROTO)\n-#define ICE_INSET_TUN_IPV4_TOS \\\n-\t(ICE_PROT_IPV4 | ICE_IP_TOS)\n-#define ICE_INSET_TUN_IPV6_SRC \\\n-\t(ICE_PROT_IPV6 | ICE_IP_SRC)\n-#define ICE_INSET_TUN_IPV6_DST \\\n-\t(ICE_PROT_IPV6 | ICE_IP_DST)\n-#define ICE_INSET_TUN_IPV6_HOP_LIMIT \\\n-\t(ICE_PROT_IPV6 | ICE_IP_TTL)\n-#define ICE_INSET_TUN_IPV6_NEXT_HDR \\\n-\t(ICE_PROT_IPV6 | ICE_IP_PROTO)\n-#define ICE_INSET_TUN_IPV6_TC \\\n-\t(ICE_PROT_IPV6 | ICE_IP_TOS)\n-\n-#define ICE_INSET_TUN_TCP_SRC_PORT \\\n-\t(ICE_PROT_TCP | ICE_SPORT)\n-#define ICE_INSET_TUN_TCP_DST_PORT \\\n-\t(ICE_PROT_TCP | ICE_DPORT)\n-#define ICE_INSET_TUN_UDP_SRC_PORT \\\n-\t(ICE_PROT_UDP | ICE_SPORT)\n-#define ICE_INSET_TUN_UDP_DST_PORT \\\n-\t(ICE_PROT_UDP | ICE_DPORT)\n-#define ICE_INSET_TUN_SCTP_SRC_PORT \\\n-\t(ICE_PROT_SCTP | ICE_SPORT)\n-#define ICE_INSET_TUN_SCTP_DST_PORT \\\n-\t(ICE_PROT_SCTP | ICE_DPORT)\n-#define ICE_INSET_TUN_ICMP4_SRC_PORT \\\n-\t(ICE_PROT_ICMP4 | ICE_SPORT)\n-#define ICE_INSET_TUN_ICMP4_DST_PORT \\\n-\t(ICE_PROT_ICMP4 | ICE_DPORT)\n-#define ICE_INSET_TUN_ICMP6_SRC_PORT \\\n-\t(ICE_PROT_ICMP6 | ICE_SPORT)\n-#define ICE_INSET_TUN_ICMP6_DST_PORT \\\n-\t(ICE_PROT_ICMP6 | ICE_DPORT)\n-#define ICE_INSET_TUN_ICMP4_TYPE \\\n-\t(ICE_PROT_ICMP4 | ICE_ICMP_TYPE)\n-#define ICE_INSET_TUN_ICMP4_CODE \\\n-\t(ICE_PROT_ICMP4 | ICE_ICMP_CODE)\n-#define ICE_INSET_TUN_ICMP6_TYPE \\\n-\t(ICE_PROT_ICMP6 | ICE_ICMP_TYPE)\n-#define ICE_INSET_TUN_ICMP6_CODE \\\n-\t(ICE_PROT_ICMP6 | ICE_ICMP_CODE)\n-\n-#define ICE_INSET_TUN_VXLAN_VNI \\\n+#define ICE_INSET_VXLAN_VNI \\\n \t(ICE_PROT_VXLAN | ICE_VXLAN_VNI)\n-#define ICE_INSET_TUN_NVGRE_TNI \\\n+#define ICE_INSET_NVGRE_TNI \\\n \t(ICE_PROT_NVGRE | ICE_NVGRE_TNI)\n #define ICE_INSET_GTPU_TEID \\\n \t(ICE_PROT_GTPU | ICE_GTPU_TEID)\n@@ -473,8 +418,8 @@ enum ice_flow_classification_stage {\n /* pattern structure */\n struct ice_pattern_match_item {\n \tenum rte_flow_item_type *pattern_list;\n-\tuint64_t input_set_mask_o; /* used for tunnel outer or non tunnel fields */\n \t/* pattern_list must end with RTE_FLOW_ITEM_TYPE_END */\n+\tuint64_t input_set_mask_o; /* used for tunnel outer or non tunnel fields */\n \tuint64_t input_set_mask_i; /* only used for tunnel inner fields */\n \tvoid *meta;\n };\ndiff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c\nindex c9d2ec7410..9603103b88 100644\n--- a/drivers/net/ice/ice_switch_filter.c\n+++ b/drivers/net/ice/ice_switch_filter.c\n@@ -68,26 +68,26 @@\n \tICE_INSET_UDP_DST_PORT | ICE_INSET_UDP_SRC_PORT)\n #define ICE_SW_INSET_DIST_NVGRE_IPV4 ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_DMAC | \\\n-\tICE_INSET_TUN_NVGRE_TNI)\n+\tICE_INSET_NVGRE_TNI)\n #define ICE_SW_INSET_DIST_VXLAN_IPV4 ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | ICE_INSET_DMAC | \\\n-\tICE_INSET_TUN_VXLAN_VNI)\n+\tICE_INSET_VXLAN_VNI)\n #define ICE_SW_INSET_DIST_NVGRE_IPV4_TCP ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \\\n \tICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT | \\\n-\tICE_INSET_DMAC | ICE_INSET_TUN_NVGRE_TNI)\n+\tICE_INSET_DMAC | ICE_INSET_NVGRE_TNI)\n #define ICE_SW_INSET_DIST_NVGRE_IPV4_UDP ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \\\n \tICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT | \\\n-\tICE_INSET_DMAC | ICE_INSET_TUN_NVGRE_TNI)\n+\tICE_INSET_DMAC | ICE_INSET_NVGRE_TNI)\n #define ICE_SW_INSET_DIST_VXLAN_IPV4_TCP ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \\\n \tICE_INSET_TCP_SRC_PORT | ICE_INSET_TCP_DST_PORT | \\\n-\tICE_INSET_DMAC | ICE_INSET_TUN_VXLAN_VNI)\n+\tICE_INSET_DMAC | ICE_INSET_VXLAN_VNI)\n #define ICE_SW_INSET_DIST_VXLAN_IPV4_UDP ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \\\n \tICE_INSET_UDP_SRC_PORT | ICE_INSET_UDP_DST_PORT | \\\n-\tICE_INSET_DMAC | ICE_INSET_TUN_VXLAN_VNI)\n+\tICE_INSET_DMAC | ICE_INSET_VXLAN_VNI)\n #define ICE_SW_INSET_PERM_TUNNEL_IPV4 ( \\\n \tICE_INSET_IPV4_SRC | ICE_INSET_IPV4_DST | \\\n \tICE_INSET_IPV4_PROTO | ICE_INSET_IPV4_TOS)\n@@ -911,7 +911,7 @@ ice_switch_parse_pattern(const struct rte_flow_item pattern[],\n \t\t\t\t\t\t(vxlan_mask->vni[2] << 16) |\n \t\t\t\t\t\t(vxlan_mask->vni[1] << 8) |\n \t\t\t\t\t\tvxlan_mask->vni[0];\n-\t\t\t\t\t*input |= ICE_INSET_TUN_VXLAN_VNI;\n+\t\t\t\t\t*input |= ICE_INSET_VXLAN_VNI;\n \t\t\t\t\tinput_set_byte += 2;\n \t\t\t\t}\n \t\t\t\tt++;\n@@ -949,7 +949,7 @@ ice_switch_parse_pattern(const struct rte_flow_item pattern[],\n \t\t\t\t\t\t(nvgre_mask->tni[2] << 16) |\n \t\t\t\t\t\t(nvgre_mask->tni[1] << 8) |\n \t\t\t\t\t\tnvgre_mask->tni[0];\n-\t\t\t\t\t*input |= ICE_INSET_TUN_NVGRE_TNI;\n+\t\t\t\t\t*input |= ICE_INSET_NVGRE_TNI;\n \t\t\t\t\tinput_set_byte += 2;\n \t\t\t\t}\n \t\t\t\tt++;\n",
    "prefixes": [
        "v2",
        "2/2"
    ]
}