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GET /api/patches/90913/?format=api
{ "id": 90913, "url": "http://patches.dpdk.org/api/patches/90913/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210408204849.9543-19-shirik@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210408204849.9543-19-shirik@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210408204849.9543-19-shirik@nvidia.com", "date": "2021-04-08T20:48:43", "name": "[18/24] crypto/mlx5: support session operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "74eea83498710624bf14f9aed5b03ca8785b85fd", "submitter": { "id": 1894, "url": "http://patches.dpdk.org/api/people/1894/?format=api", "name": "Shiri Kuzin", "email": "shirik@nvidia.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210408204849.9543-19-shirik@nvidia.com/mbox/", "series": [ { "id": 16215, "url": "http://patches.dpdk.org/api/series/16215/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16215", "date": "2021-04-08T20:48:25", "name": "drivers: introduce mlx5 crypto PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/16215/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/90913/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/90913/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 02FF7A0C46;\n\tThu, 8 Apr 2021 22:51:13 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6EA70141267;\n\tThu, 8 Apr 2021 22:50:00 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by mails.dpdk.org (Postfix) with ESMTP id 0C37614124A\n for <dev@dpdk.org>; Thu, 8 Apr 2021 22:49:55 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n shirik@nvidia.com) with SMTP; 8 Apr 2021 23:49:51 +0300", "from nvidia.com (c-236-0-60-063.mtl.labs.mlnx [10.236.0.63])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 138KnAJb028067;\n Thu, 8 Apr 2021 23:49:51 +0300" ], "From": "Shiri Kuzin <shirik@nvidia.com>", "To": "dev@dpdk.org", "Cc": "matan@nvidia.com, gakhil@marvell.com, suanmingm@nvidia.com", "Date": "Thu, 8 Apr 2021 23:48:43 +0300", "Message-Id": "<20210408204849.9543-19-shirik@nvidia.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20210408204849.9543-1-shirik@nvidia.com>", "References": "<1615447568-260965-1-git-send-email-matan@nvidia.com>\n <20210408204849.9543-1-shirik@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 18/24] crypto/mlx5: support session operations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Sessions are used in symmetric transformations in order to prepare\nobjects and data for packet processing stage.\n\nA mlx5 session includes iv_offset, pointer to mlx5_crypto_dek struct,\nbsf_size, bsf_p_type, encryption_order and encryption standard.\n\nImplement the next session operations:\n mlx5_crypto_sym_session_get_size- returns the size of the mlx5\n\tsession struct.\n\tmlx5_crypto_sym_session_configure- prepares the DEK hash-list\n\tand saves all the session data.\n\tmlx5_crypto_sym_session_clear - destroys the DEK hash-list.\n\nSigned-off-by: Shiri Kuzin <shirik@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/crypto/mlx5/mlx5_crypto.c | 92 ++++++++++++++++++++++++++++++-\n 1 file changed, 89 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex 17aaaaa53d..b0242afec4 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -3,6 +3,7 @@\n */\n \n #include <rte_malloc.h>\n+#include <rte_mempool.h>\n #include <rte_errno.h>\n #include <rte_log.h>\n #include <rte_pci.h>\n@@ -36,6 +37,23 @@ static const struct rte_driver mlx5_drv = {\n \n static struct cryptodev_driver mlx5_cryptodev_driver;\n \n+struct mlx5_crypto_session {\n+\tuint32_t bs_bpt_eo_es;\n+\t/*\n+\t * bsf_size, bsf_p_type, encryption_order and encryption standard,\n+\t * saved in big endian format.\n+\t */\n+\tuint32_t iv_offset:16;\n+\t/* Starting point for Initialisation Vector. */\n+\tstruct mlx5_crypto_dek *dek; /* Pointer to dek struct. */\n+} __rte_packed;\n+\n+static unsigned int\n+mlx5_crypto_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)\n+{\n+\treturn sizeof(struct mlx5_crypto_session);\n+}\n+\n static int\n mlx5_crypto_dev_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_cryptodev_config *config __rte_unused)\n@@ -58,6 +76,74 @@ mlx5_crypto_dev_close(struct rte_cryptodev *dev)\n \treturn 0;\n }\n \n+static int\n+mlx5_crypto_sym_session_configure(struct rte_cryptodev *dev,\n+\t\t\t\t struct rte_crypto_sym_xform *xform,\n+\t\t\t\t struct rte_cryptodev_sym_session *session,\n+\t\t\t\t struct rte_mempool *mp)\n+{\n+\tstruct mlx5_crypto_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_crypto_session *sess_private_data;\n+\tstruct rte_crypto_cipher_xform *cipher;\n+\tuint8_t encryption_order;\n+\tint ret;\n+\n+\tif (unlikely(xform->next != NULL)) {\n+\t\tDRV_LOG(ERR, \"Xform next is not supported.\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\tif (unlikely((xform->type != RTE_CRYPTO_SYM_XFORM_CIPHER) ||\n+\t\t (xform->cipher.algo != RTE_CRYPTO_CIPHER_AES_XTS))) {\n+\t\tDRV_LOG(ERR, \"Only AES-XTS algorithm is supported.\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\tret = rte_mempool_get(mp, (void *)&sess_private_data);\n+\tif (ret != 0) {\n+\t\tDRV_LOG(ERR,\n+\t\t\t\"Failed to get session %p private data from mempool.\",\n+\t\t\tsess_private_data);\n+\t\treturn -ENOMEM;\n+\t}\n+\tcipher = &xform->cipher;\n+\tsess_private_data->dek = mlx5_crypto_dek_prepare(priv, cipher);\n+\tif (sess_private_data->dek == NULL) {\n+\t\trte_mempool_put(mp, sess_private_data);\n+\t\tDRV_LOG(ERR, \"Failed to prepare dek.\");\n+\t\treturn -ENOMEM;\n+\t}\n+\tif (cipher->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT)\n+\t\tencryption_order = MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_MEMORY;\n+\telse\n+\t\tencryption_order = MLX5_ENCRYPTION_ORDER_ENCRYPTED_RAW_WIRE;\n+\tsess_private_data->bs_bpt_eo_es = rte_cpu_to_be_32\n+\t\t\t(MLX5_BSF_SIZE_64B << MLX5_BSF_SIZE_OFFSET |\n+\t\t\t MLX5_BSF_P_TYPE_CRYPTO << MLX5_BSF_P_TYPE_OFFSET |\n+\t\t\t encryption_order << MLX5_ENCRYPTION_ORDER_OFFSET |\n+\t\t\t MLX5_ENCRYPTION_STANDARD_AES_XTS);\n+\tsess_private_data->iv_offset = cipher->iv.offset;\n+\tset_sym_session_private_data(session, dev->driver_id,\n+\t\t\t\t sess_private_data);\n+\tDRV_LOG(DEBUG, \"Session %p was configured.\", sess_private_data);\n+\treturn 0;\n+}\n+\n+static void\n+mlx5_crypto_sym_session_clear(struct rte_cryptodev *dev,\n+\t\t\t struct rte_cryptodev_sym_session *sess)\n+{\n+\tstruct mlx5_crypto_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_crypto_session *sess_private_data =\n+\t\t\tget_sym_session_private_data(sess, dev->driver_id);\n+\n+\tif (unlikely(sess_private_data == NULL)) {\n+\t\tDRV_LOG(ERR, \"Failed to get session %p private data.\",\n+\t\t\t\tsess_private_data);\n+\t\treturn;\n+\t}\n+\tmlx5_crypto_dek_destroy(priv, sess_private_data->dek);\n+\tDRV_LOG(DEBUG, \"Session %p was cleared.\", sess_private_data);\n+}\n+\n static struct rte_cryptodev_ops mlx5_crypto_ops = {\n \t.dev_configure\t\t\t= mlx5_crypto_dev_configure,\n \t.dev_start\t\t\t= NULL,\n@@ -68,9 +154,9 @@ static struct rte_cryptodev_ops mlx5_crypto_ops = {\n \t.stats_reset\t\t\t= NULL,\n \t.queue_pair_setup\t\t= NULL,\n \t.queue_pair_release\t\t= NULL,\n-\t.sym_session_get_size\t\t= NULL,\n-\t.sym_session_configure\t\t= NULL,\n-\t.sym_session_clear\t\t= NULL,\n+\t.sym_session_get_size\t\t= mlx5_crypto_sym_session_get_size,\n+\t.sym_session_configure\t\t= mlx5_crypto_sym_session_configure,\n+\t.sym_session_clear\t\t= mlx5_crypto_sym_session_clear,\n \t.sym_get_raw_dp_ctx_size\t= NULL,\n \t.sym_configure_raw_dp_ctx\t= NULL,\n };\n", "prefixes": [ "18/24" ] }