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GET /api/patches/90618/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 90618,
    "url": "http://patches.dpdk.org/api/patches/90618/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210406114131.25874-6-ndabilpuram@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210406114131.25874-6-ndabilpuram@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210406114131.25874-6-ndabilpuram@marvell.com",
    "date": "2021-04-06T11:40:44",
    "name": "[v4,05/52] common/cnxk: add interrupt helper API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "567681ad8f1b3400389ce6981e679a017276aa55",
    "submitter": {
        "id": 1202,
        "url": "http://patches.dpdk.org/api/people/1202/?format=api",
        "name": "Nithin Dabilpuram",
        "email": "ndabilpuram@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210406114131.25874-6-ndabilpuram@marvell.com/mbox/",
    "series": [
        {
            "id": 16128,
            "url": "http://patches.dpdk.org/api/series/16128/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=16128",
            "date": "2021-04-06T11:40:39",
            "name": "Add Marvell CNXK common driver",
            "version": 4,
            "mbox": "http://patches.dpdk.org/series/16128/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/90618/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/90618/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2362FA0546;\n\tTue,  6 Apr 2021 13:42:37 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5FFC7140EF9;\n\tTue,  6 Apr 2021 13:41:58 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 2C540140F24\n for <dev@dpdk.org>; Tue,  6 Apr 2021 13:41:56 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 136Bdw7c008331 for <dev@dpdk.org>; Tue, 6 Apr 2021 04:41:55 -0700",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 37r72p2dn0-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 06 Apr 2021 04:41:55 -0700",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 6 Apr 2021 04:41:53 -0700",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 6 Apr 2021 04:41:53 -0700",
            "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 6CBC63F703F;\n Tue,  6 Apr 2021 04:41:51 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=rwyktVUl4UBUKnyrvQDN+3eBnLBYKppRiYPTho5f3dw=;\n b=XrcEz45eIxVgfsxVi6UZW7Ti7y7IT2CmfOXto3vkOb98SpjXM+fAPLoiMQRNi+bd+qju\n YOyfH3YCDTxLDDCllGwRB7eKIopdx+nJl7nC6DTJ4G/TLz0ST1lZvR4AJnCpdYImds0z\n IKzeNFYgzplR6NoSb4VAyQuEkiSubt2L6tCynF9so5Nq0CrEoyws6PZxV16P7LJMmHo6\n 6Te/yLx+xtrxKZc9M5N7RLfwAZ+3riXbW8izWCY6T31psRwbiSq2r1OcLszVZt+EyGtl\n 8DSqSRzd+dAC7LtkLeaTLpb4VKqVxCr3JJ9/ynq+b39GVqR+BmKsQ02GSPY0Yxh6YaN8 Nw==",
        "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>",
        "Date": "Tue, 6 Apr 2021 17:10:44 +0530",
        "Message-ID": "<20210406114131.25874-6-ndabilpuram@marvell.com>",
        "X-Mailer": "git-send-email 2.8.4",
        "In-Reply-To": "<20210406114131.25874-1-ndabilpuram@marvell.com>",
        "References": "<20210305133918.8005-1-ndabilpuram@marvell.com>\n <20210406114131.25874-1-ndabilpuram@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "eQjYcS2FFEIVcrKzQZ1yY28ec14kIa6R",
        "X-Proofpoint-ORIG-GUID": "eQjYcS2FFEIVcrKzQZ1yY28ec14kIa6R",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-04-06_02:2021-04-01,\n 2021-04-06 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v4 05/52] common/cnxk: add interrupt helper API",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Jerin Jacob <jerinj@marvell.com>\n\nAdd interrupt helper API's in common code to register and\nunregister for specific interrupt vectors. These API's\nwill be used by all cnxk drivers.\n\nSigned-off-by: Jerin Jacob <jerinj@marvell.com>\n---\n drivers/common/cnxk/meson.build    |   3 +-\n drivers/common/cnxk/roc_dev_priv.h |  14 +++\n drivers/common/cnxk/roc_irq.c      | 249 +++++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_platform.c |   4 +\n drivers/common/cnxk/roc_platform.h |  11 ++\n drivers/common/cnxk/roc_priv.h     |   3 +\n drivers/common/cnxk/version.map    |   1 +\n 7 files changed, 284 insertions(+), 1 deletion(-)\n create mode 100644 drivers/common/cnxk/roc_dev_priv.h\n create mode 100644 drivers/common/cnxk/roc_irq.c",
    "diff": "diff --git a/drivers/common/cnxk/meson.build b/drivers/common/cnxk/meson.build\nindex b0c02ce..3e0678d 100644\n--- a/drivers/common/cnxk/meson.build\n+++ b/drivers/common/cnxk/meson.build\n@@ -10,7 +10,8 @@ endif\n \n config_flag_fmt = 'RTE_LIBRTE_@0@_COMMON'\n deps = ['eal', 'pci', 'bus_pci', 'mbuf']\n-sources = files('roc_model.c',\n+sources = files('roc_irq.c',\n+\t\t'roc_model.c',\n \t\t'roc_platform.c',\n \t\t'roc_utils.c')\n includes += include_directories('../../bus/pci')\ndiff --git a/drivers/common/cnxk/roc_dev_priv.h b/drivers/common/cnxk/roc_dev_priv.h\nnew file mode 100644\nindex 0000000..2254677\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_dev_priv.h\n@@ -0,0 +1,14 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#ifndef _ROC_DEV_PRIV_H\n+#define _ROC_DEV_PRIV_H\n+\n+int dev_irq_register(struct plt_intr_handle *intr_handle,\n+\t\t     plt_intr_callback_fn cb, void *data, unsigned int vec);\n+void dev_irq_unregister(struct plt_intr_handle *intr_handle,\n+\t\t\tplt_intr_callback_fn cb, void *data, unsigned int vec);\n+int dev_irqs_disable(struct plt_intr_handle *intr_handle);\n+\n+#endif /* _ROC_DEV_PRIV_H */\ndiff --git a/drivers/common/cnxk/roc_irq.c b/drivers/common/cnxk/roc_irq.c\nnew file mode 100644\nindex 0000000..4c2b4c3\n--- /dev/null\n+++ b/drivers/common/cnxk/roc_irq.c\n@@ -0,0 +1,249 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"roc_api.h\"\n+#include \"roc_priv.h\"\n+\n+#if defined(__linux__)\n+\n+#include <inttypes.h>\n+#include <linux/vfio.h>\n+#include <sys/eventfd.h>\n+#include <sys/ioctl.h>\n+#include <unistd.h>\n+\n+#define MSIX_IRQ_SET_BUF_LEN                                                   \\\n+\t(sizeof(struct vfio_irq_set) + sizeof(int) * (PLT_MAX_RXTX_INTR_VEC_ID))\n+\n+static int\n+irq_get_info(struct plt_intr_handle *intr_handle)\n+{\n+\tstruct vfio_irq_info irq = {.argsz = sizeof(irq)};\n+\tint rc;\n+\n+\tirq.index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\n+\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to get IRQ info rc=%d errno=%d\", rc, errno);\n+\t\treturn rc;\n+\t}\n+\n+\tplt_base_dbg(\"Flags=0x%x index=0x%x count=0x%x max_intr_vec_id=0x%x\",\n+\t\t     irq.flags, irq.index, irq.count, PLT_MAX_RXTX_INTR_VEC_ID);\n+\n+\tif (irq.count > PLT_MAX_RXTX_INTR_VEC_ID) {\n+\t\tplt_err(\"HW max=%d > PLT_MAX_RXTX_INTR_VEC_ID: %d\", irq.count,\n+\t\t\tPLT_MAX_RXTX_INTR_VEC_ID);\n+\t\tintr_handle->max_intr = PLT_MAX_RXTX_INTR_VEC_ID;\n+\t} else {\n+\t\tintr_handle->max_intr = irq.count;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+irq_config(struct plt_intr_handle *intr_handle, unsigned int vec)\n+{\n+\tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n+\tstruct vfio_irq_set *irq_set;\n+\tint32_t *fd_ptr;\n+\tint len, rc;\n+\n+\tif (vec > intr_handle->max_intr) {\n+\t\tplt_err(\"vector=%d greater than max_intr=%d\", vec,\n+\t\t\tintr_handle->max_intr);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tlen = sizeof(struct vfio_irq_set) + sizeof(int32_t);\n+\n+\tirq_set = (struct vfio_irq_set *)irq_set_buf;\n+\tirq_set->argsz = len;\n+\n+\tirq_set->start = vec;\n+\tirq_set->count = 1;\n+\tirq_set->flags =\n+\t\tVFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\n+\t/* Use vec fd to set interrupt vectors */\n+\tfd_ptr = (int32_t *)&irq_set->data[0];\n+\tfd_ptr[0] = intr_handle->efds[vec];\n+\n+\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tif (rc)\n+\t\tplt_err(\"Failed to set_irqs vector=0x%x rc=%d\", vec, rc);\n+\n+\treturn rc;\n+}\n+\n+static int\n+irq_init(struct plt_intr_handle *intr_handle)\n+{\n+\tchar irq_set_buf[MSIX_IRQ_SET_BUF_LEN];\n+\tstruct vfio_irq_set *irq_set;\n+\tint32_t *fd_ptr;\n+\tint len, rc;\n+\tuint32_t i;\n+\n+\tif (intr_handle->max_intr > PLT_MAX_RXTX_INTR_VEC_ID) {\n+\t\tplt_err(\"Max_intr=%d greater than PLT_MAX_RXTX_INTR_VEC_ID=%d\",\n+\t\t\tintr_handle->max_intr, PLT_MAX_RXTX_INTR_VEC_ID);\n+\t\treturn -ERANGE;\n+\t}\n+\n+\tlen = sizeof(struct vfio_irq_set) +\n+\t      sizeof(int32_t) * intr_handle->max_intr;\n+\n+\tirq_set = (struct vfio_irq_set *)irq_set_buf;\n+\tirq_set->argsz = len;\n+\tirq_set->start = 0;\n+\tirq_set->count = intr_handle->max_intr;\n+\tirq_set->flags =\n+\t\tVFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;\n+\tirq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;\n+\n+\tfd_ptr = (int32_t *)&irq_set->data[0];\n+\tfor (i = 0; i < irq_set->count; i++)\n+\t\tfd_ptr[i] = -1;\n+\n+\trc = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);\n+\tif (rc)\n+\t\tplt_err(\"Failed to set irqs vector rc=%d\", rc);\n+\n+\treturn rc;\n+}\n+\n+int\n+dev_irqs_disable(struct plt_intr_handle *intr_handle)\n+{\n+\t/* Clear max_intr to indicate re-init next time */\n+\tintr_handle->max_intr = 0;\n+\treturn plt_intr_disable(intr_handle);\n+}\n+\n+int\n+dev_irq_register(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n+\t\t void *data, unsigned int vec)\n+{\n+\tstruct plt_intr_handle tmp_handle;\n+\tint rc;\n+\n+\t/* If no max_intr read from VFIO */\n+\tif (intr_handle->max_intr == 0) {\n+\t\tirq_get_info(intr_handle);\n+\t\tirq_init(intr_handle);\n+\t}\n+\n+\tif (vec > intr_handle->max_intr) {\n+\t\tplt_err(\"Vector=%d greater than max_intr=%d\", vec,\n+\t\t\tintr_handle->max_intr);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\ttmp_handle = *intr_handle;\n+\t/* Create new eventfd for interrupt vector */\n+\ttmp_handle.fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);\n+\tif (tmp_handle.fd == -1)\n+\t\treturn -ENODEV;\n+\n+\t/* Register vector interrupt callback */\n+\trc = plt_intr_callback_register(&tmp_handle, cb, data);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to register vector:0x%x irq callback.\", vec);\n+\t\treturn rc;\n+\t}\n+\n+\tintr_handle->efds[vec] = tmp_handle.fd;\n+\tintr_handle->nb_efd =\n+\t\t(vec > intr_handle->nb_efd) ? vec : intr_handle->nb_efd;\n+\tif ((intr_handle->nb_efd + 1) > intr_handle->max_intr)\n+\t\tintr_handle->max_intr = intr_handle->nb_efd + 1;\n+\n+\tplt_base_dbg(\"Enable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n+\t\t     intr_handle->nb_efd, intr_handle->max_intr);\n+\n+\t/* Enable MSIX vectors to VFIO */\n+\treturn irq_config(intr_handle, vec);\n+}\n+\n+void\n+dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n+\t\t   void *data, unsigned int vec)\n+{\n+\tstruct plt_intr_handle tmp_handle;\n+\tuint8_t retries = 5; /* 5 ms */\n+\tint rc;\n+\n+\tif (vec > intr_handle->max_intr) {\n+\t\tplt_err(\"Error unregistering MSI-X interrupts vec:%d > %d\", vec,\n+\t\t\tintr_handle->max_intr);\n+\t\treturn;\n+\t}\n+\n+\ttmp_handle = *intr_handle;\n+\ttmp_handle.fd = intr_handle->efds[vec];\n+\tif (tmp_handle.fd == -1)\n+\t\treturn;\n+\n+\tdo {\n+\t\t/* Un-register callback func from platform lib */\n+\t\trc = plt_intr_callback_unregister(&tmp_handle, cb, data);\n+\t\t/* Retry only if -EAGAIN */\n+\t\tif (rc != -EAGAIN)\n+\t\t\tbreak;\n+\t\tplt_delay_ms(1);\n+\t\tretries--;\n+\t} while (retries);\n+\n+\tif (rc < 0) {\n+\t\tplt_err(\"Error unregistering MSI-X vec %d cb, rc=%d\", vec, rc);\n+\t\treturn;\n+\t}\n+\n+\tplt_base_dbg(\"Disable vector:0x%x for vfio (efds: %d, max:%d)\", vec,\n+\t\t     intr_handle->nb_efd, intr_handle->max_intr);\n+\n+\tif (intr_handle->efds[vec] != -1)\n+\t\tclose(intr_handle->efds[vec]);\n+\t/* Disable MSIX vectors from VFIO */\n+\tintr_handle->efds[vec] = -1;\n+\tirq_config(intr_handle, vec);\n+}\n+\n+#else\n+\n+int\n+dev_irq_register(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n+\t\t void *data, unsigned int vec)\n+{\n+\tPLT_SET_USED(intr_handle);\n+\tPLT_SET_USED(cb);\n+\tPLT_SET_USED(data);\n+\tPLT_SET_USED(vec);\n+\n+\treturn -ENOTSUP;\n+}\n+\n+void\n+dev_irq_unregister(struct plt_intr_handle *intr_handle, plt_intr_callback_fn cb,\n+\t\t   void *data, unsigned int vec)\n+{\n+\tPLT_SET_USED(intr_handle);\n+\tPLT_SET_USED(cb);\n+\tPLT_SET_USED(data);\n+\tPLT_SET_USED(vec);\n+}\n+\n+int\n+dev_irqs_disable(struct plt_intr_handle *intr_handle)\n+{\n+\tPLT_SET_USED(intr_handle);\n+\n+\treturn -ENOTSUP;\n+}\n+\n+#endif /* __linux__ */\ndiff --git a/drivers/common/cnxk/roc_platform.c b/drivers/common/cnxk/roc_platform.c\nindex 3eba1a7..43ee7a1 100644\n--- a/drivers/common/cnxk/roc_platform.c\n+++ b/drivers/common/cnxk/roc_platform.c\n@@ -2,6 +2,8 @@\n  * Copyright(C) 2021 Marvell.\n  */\n \n+#include <rte_log.h>\n+\n #include \"roc_api.h\"\n \n #define ROC_PLT_INIT_CB_MAX 8\n@@ -50,3 +52,5 @@ roc_plt_init(void)\n \n \treturn 0;\n }\n+\n+RTE_LOG_REGISTER(cnxk_logtype_base, pmd.cnxk.base, NOTICE);\ndiff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h\nindex b358efe..4fa4631 100644\n--- a/drivers/common/cnxk/roc_platform.h\n+++ b/drivers/common/cnxk/roc_platform.h\n@@ -132,12 +132,23 @@\n #define plt_strlcpy rte_strlcpy\n \n /* Log */\n+extern int cnxk_logtype_base;\n #define plt_err(fmt, args...)                                                  \\\n \tRTE_LOG(ERR, PMD, \"%s():%u \" fmt \"\\n\", __func__, __LINE__, ##args)\n #define plt_info(fmt, args...) RTE_LOG(INFO, PMD, fmt \"\\n\", ##args)\n #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt \"\\n\", ##args)\n #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt \"\\n\", ##args)\n \n+/**\n+ * Log debug message if given subsystem logging is enabled.\n+ */\n+#define plt_dbg(subsystem, fmt, args...)                                       \\\n+\trte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem,                       \\\n+\t\t\"[%s] %s():%u \" fmt \"\\n\", #subsystem, __func__, __LINE__,      \\\n+\t\t##args)\n+\n+#define plt_base_dbg(fmt, ...)\tplt_dbg(base, fmt, ##__VA_ARGS__)\n+\n #ifdef __cplusplus\n #define CNXK_PCI_ID(subsystem_dev, dev)\t\t\t\t\\\n \t{\t\t\t\t\t\t\t\\\ndiff --git a/drivers/common/cnxk/roc_priv.h b/drivers/common/cnxk/roc_priv.h\nindex 9c905d4..cd87035 100644\n--- a/drivers/common/cnxk/roc_priv.h\n+++ b/drivers/common/cnxk/roc_priv.h\n@@ -8,4 +8,7 @@\n /* Utils */\n #include \"roc_util_priv.h\"\n \n+/* Dev */\n+#include \"roc_dev_priv.h\"\n+\n #endif /* _ROC_PRIV_H_ */\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 984feb3..e2cb838 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -1,6 +1,7 @@\n INTERNAL {\n \tglobal:\n \n+\tcnxk_logtype_base;\n \troc_error_msg_get;\n \troc_model;\n \troc_plt_init;\n",
    "prefixes": [
        "v4",
        "05/52"
    ]
}