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GET /api/patches/88607/?format=api
{ "id": 88607, "url": "http://patches.dpdk.org/api/patches/88607/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210306153404.10781-11-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20210306153404.10781-11-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20210306153404.10781-11-ndabilpuram@marvell.com", "date": "2021-03-06T15:33:30", "name": "[10/44] net/cnxk: add queue start and stop support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a89967ca6bb1e7f199501d904cb807960dd21958", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210306153404.10781-11-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 15515, "url": "http://patches.dpdk.org/api/series/15515/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=15515", "date": "2021-03-06T15:33:20", "name": "Marvell CNXK Ethdev Driver", "version": 1, "mbox": "http://patches.dpdk.org/series/15515/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/88607/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/88607/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 853EEA0548;\n\tSat, 6 Mar 2021 16:35:54 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 31A7022A393;\n\tSat, 6 Mar 2021 16:34:49 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id C9BCB22A391\n for <dev@dpdk.org>; Sat, 6 Mar 2021 16:34:47 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 126FWmqO029543 for <dev@dpdk.org>; Sat, 6 Mar 2021 07:34:47 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 3747yurcbe-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sat, 06 Mar 2021 07:34:46 -0800", "from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sat, 6 Mar 2021 07:34:45 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH03.marvell.com\n (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Sat, 6 Mar 2021 07:34:45 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sat, 6 Mar 2021 07:34:44 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 5E2F33F703F;\n Sat, 6 Mar 2021 07:34:42 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=1wgiLcLazGp01gst+R9JZM+FM45OQKqLR4umDag8JHY=;\n b=TW/h8Fqdw9lX6FBrNprdn91cZj/4yD3/DrjHur6I2p4d7kTJeQ9vK/C/V1XmZXIwiK2n\n f1eobAebwiO+TqSyXjw4e5pI7ficd9Ux6s0YYg0EL924JPxW3ruMkgec4noEzkYsVMqp\n 571q3oYkbacKv4xXVtZgu8Lz9ZrMqac7A/FCtzU1B5CuFEA0wQeZFW0ucg7yi/SJ1QjK\n /vxxKnVde30XdnjwU0qF3MV/W6vaSUEaBtM578PyiXR6morTPlRZKN8o2AXcSt3AE5jl\n ymbZ6UB6ol060gZFXIGmPedihvQ8EXyd4i8WhVhVp9rxLSVNid2xw+s/G8CF4TI6TrBT fQ==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<jerinj@marvell.com>, <skori@marvell.com>, <skoteshwar@marvell.com>,\n <pbhagavatula@marvell.com>, <kirankumark@marvell.com>,\n <psatheesh@marvell.com>, <asekhar@marvell.com>, Nithin Dabilpuram\n <ndabilpuram@marvell.com>", "Date": "Sat, 6 Mar 2021 21:03:30 +0530", "Message-ID": "<20210306153404.10781-11-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20210306153404.10781-1-ndabilpuram@marvell.com>", "References": "<20210306153404.10781-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.369, 18.0.761\n definitions=2021-03-06_08:2021-03-03,\n 2021-03-06 signatures=0", "Subject": "[dpdk-dev] [PATCH 10/44] net/cnxk: add queue start and stop support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add Rx/Tx queue start and stop callbacks for\nCN9K and CN10K.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n doc/guides/nics/features/cnxk.ini | 1 +\n doc/guides/nics/features/cnxk_vec.ini | 1 +\n doc/guides/nics/features/cnxk_vf.ini | 1 +\n drivers/net/cnxk/cn10k_ethdev.c | 16 ++++++\n drivers/net/cnxk/cn9k_ethdev.c | 16 ++++++\n drivers/net/cnxk/cnxk_ethdev.c | 92 +++++++++++++++++++++++++++++++++++\n drivers/net/cnxk/cnxk_ethdev.h | 1 +\n 7 files changed, 128 insertions(+)", "diff": "diff --git a/doc/guides/nics/features/cnxk.ini b/doc/guides/nics/features/cnxk.ini\nindex 503582c..712f8d5 100644\n--- a/doc/guides/nics/features/cnxk.ini\n+++ b/doc/guides/nics/features/cnxk.ini\n@@ -12,6 +12,7 @@ Link status = Y\n Link status event = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop = Y\n RSS hash = Y\n Inner RSS = Y\n Packet type parsing = Y\ndiff --git a/doc/guides/nics/features/cnxk_vec.ini b/doc/guides/nics/features/cnxk_vec.ini\nindex 9ad225a..82f2af0 100644\n--- a/doc/guides/nics/features/cnxk_vec.ini\n+++ b/doc/guides/nics/features/cnxk_vec.ini\n@@ -12,6 +12,7 @@ Link status = Y\n Link status event = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop = Y\n RSS hash = Y\n Inner RSS = Y\n Packet type parsing = Y\ndiff --git a/doc/guides/nics/features/cnxk_vf.ini b/doc/guides/nics/features/cnxk_vf.ini\nindex 8c93ba7..61fed11 100644\n--- a/doc/guides/nics/features/cnxk_vf.ini\n+++ b/doc/guides/nics/features/cnxk_vf.ini\n@@ -11,6 +11,7 @@ Link status = Y\n Link status event = Y\n Runtime Rx queue setup = Y\n Runtime Tx queue setup = Y\n+Queue start/stop = Y\n RSS hash = Y\n Inner RSS = Y\n Packet type parsing = Y\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex efd5b67..1a9fcbb 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -137,6 +137,21 @@ cn10k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n }\n \n static int\n+cn10k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)\n+{\n+\tstruct cn10k_eth_txq *txq = eth_dev->data->tx_queues[qidx];\n+\tint rc;\n+\n+\trc = cnxk_nix_tx_queue_stop(eth_dev, qidx);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Clear fc cache pkts to trigger worker stop */\n+\ttxq->fc_cache_pkts = 0;\n+\treturn 0;\n+}\n+\n+static int\n cn10k_nix_configure(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n@@ -168,6 +183,7 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_configure = cn10k_nix_configure;\n \tcnxk_eth_dev_ops.tx_queue_setup = cn10k_nix_tx_queue_setup;\n \tcnxk_eth_dev_ops.rx_queue_setup = cn10k_nix_rx_queue_setup;\n+\tcnxk_eth_dev_ops.tx_queue_stop = cn10k_nix_tx_queue_stop;\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn10k_nix_ptypes_set;\n }\n \ndiff --git a/drivers/net/cnxk/cn9k_ethdev.c b/drivers/net/cnxk/cn9k_ethdev.c\nindex 3f3de4f..3561632 100644\n--- a/drivers/net/cnxk/cn9k_ethdev.c\n+++ b/drivers/net/cnxk/cn9k_ethdev.c\n@@ -135,6 +135,21 @@ cn9k_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n }\n \n static int\n+cn9k_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)\n+{\n+\tstruct cn9k_eth_txq *txq = eth_dev->data->tx_queues[qidx];\n+\tint rc;\n+\n+\trc = cnxk_nix_tx_queue_stop(eth_dev, qidx);\n+\tif (rc)\n+\t\treturn rc;\n+\n+\t/* Clear fc cache pkts to trigger worker stop */\n+\ttxq->fc_cache_pkts = 0;\n+\treturn 0;\n+}\n+\n+static int\n cn9k_nix_configure(struct rte_eth_dev *eth_dev)\n {\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n@@ -177,6 +192,7 @@ nix_eth_dev_ops_override(void)\n \tcnxk_eth_dev_ops.dev_configure = cn9k_nix_configure;\n \tcnxk_eth_dev_ops.tx_queue_setup = cn9k_nix_tx_queue_setup;\n \tcnxk_eth_dev_ops.rx_queue_setup = cn9k_nix_rx_queue_setup;\n+\tcnxk_eth_dev_ops.tx_queue_stop = cn9k_nix_tx_queue_stop;\n \tcnxk_eth_dev_ops.dev_ptypes_set = cn9k_nix_ptypes_set;\n }\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c\nindex 96acf90..f1ba04f 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.c\n+++ b/drivers/net/cnxk/cnxk_ethdev.c\n@@ -819,12 +819,104 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev)\n \treturn rc;\n }\n \n+static int\n+cnxk_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_sq *sq = &dev->sqs[qid];\n+\tint rc = -EINVAL;\n+\n+\tif (data->tx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STARTED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_tm_sq_aura_fc(sq, true);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to enable sq aura fc, txq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->tx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STARTED;\n+done:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_sq *sq = &dev->sqs[qid];\n+\tint rc;\n+\n+\tif (data->tx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STOPPED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_tm_sq_aura_fc(sq, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to disable sqb aura fc, txq=%u, rc=%d\", qid,\n+\t\t\trc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->tx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STOPPED;\n+done:\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_nix_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_rq *rq = &dev->rqs[qid];\n+\tint rc;\n+\n+\tif (data->rx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STARTED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_rq_ena_dis(rq, true);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to enable rxq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->rx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STARTED;\n+done:\n+\treturn rc;\n+}\n+\n+static int\n+cnxk_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\tstruct rte_eth_dev_data *data = eth_dev->data;\n+\tstruct roc_nix_rq *rq = &dev->rqs[qid];\n+\tint rc;\n+\n+\tif (data->rx_queue_state[qid] == RTE_ETH_QUEUE_STATE_STOPPED)\n+\t\treturn 0;\n+\n+\trc = roc_nix_rq_ena_dis(rq, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to disable rxq=%u, rc=%d\", qid, rc);\n+\t\tgoto done;\n+\t}\n+\n+\tdata->rx_queue_state[qid] = RTE_ETH_QUEUE_STATE_STOPPED;\n+done:\n+\treturn rc;\n+}\n+\n /* CNXK platform independent eth dev ops */\n struct eth_dev_ops cnxk_eth_dev_ops = {\n \t.dev_infos_get = cnxk_nix_info_get,\n \t.link_update = cnxk_nix_link_update,\n \t.tx_queue_release = cnxk_nix_tx_queue_release,\n \t.rx_queue_release = cnxk_nix_rx_queue_release,\n+\t.tx_queue_start = cnxk_nix_tx_queue_start,\n+\t.rx_queue_start = cnxk_nix_rx_queue_start,\n+\t.rx_queue_stop = cnxk_nix_rx_queue_stop,\n \t.dev_supported_ptypes_get = cnxk_nix_supported_ptypes_get,\n };\n \ndiff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h\nindex 6b7261c..7e79a8d 100644\n--- a/drivers/net/cnxk/cnxk_ethdev.h\n+++ b/drivers/net/cnxk/cnxk_ethdev.h\n@@ -199,6 +199,7 @@ int cnxk_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, uint16_t qid,\n \t\t\t uint16_t nb_desc, uint16_t fp_rx_q_sz,\n \t\t\t const struct rte_eth_rxconf *rx_conf,\n \t\t\t struct rte_mempool *mp);\n+int cnxk_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qid);\n \n uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);\n \n", "prefixes": [ "10/44" ] }