get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/87440/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 87440,
    "url": "http://patches.dpdk.org/api/patches/87440/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20210127160948.6008-34-lironh@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20210127160948.6008-34-lironh@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20210127160948.6008-34-lironh@marvell.com",
    "date": "2021-01-27T16:09:47",
    "name": "[v3,33/34] net/mvpp2: update qos defaults parameter name",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "13d84c22926feb57be76bdebf24088144a7797df",
    "submitter": {
        "id": 996,
        "url": "http://patches.dpdk.org/api/people/996/?format=api",
        "name": "Liron Himi",
        "email": "lironh@marvell.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20210127160948.6008-34-lironh@marvell.com/mbox/",
    "series": [
        {
            "id": 14976,
            "url": "http://patches.dpdk.org/api/series/14976/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14976",
            "date": "2021-01-27T16:09:14",
            "name": "net/mvpp2: misc updates",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/14976/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/87440/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/87440/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4AFDAA052A;\n\tWed, 27 Jan 2021 17:16:53 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 55146140F95;\n\tWed, 27 Jan 2021 17:11:13 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id E7C3B140EB7\n for <dev@dpdk.org>; Wed, 27 Jan 2021 17:11:09 +0100 (CET)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 10RG62kt017155; Wed, 27 Jan 2021 08:11:09 -0800",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com with ESMTP id 36b1xphfw2-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 27 Jan 2021 08:11:08 -0800",
            "from SC-EXCH02.marvell.com (10.93.176.82) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 27 Jan 2021 08:11:07 -0800",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH02.marvell.com\n (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 27 Jan 2021 08:11:07 -0800",
            "from pt-lxl0023.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 27 Jan 2021 08:11:05 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=eRmOqcmAD9mJeMj2jIZe51SHo8jPTTwZpchYPqEy2js=;\n b=hXcvPa/ByJ1NDX0VQzKampfjWLZYqoBsCEctK7IDgdcTfpOitdsA/0YneWR7xO1D6D+a\n jfeF89Pe4Mkl0lI16U11M+fz24qyEPQRZYN9Fsq5e1yZJZ3BNbIuxiuUUsBgRSU9a/gn\n G60e6iKmpleyeiNfD90jYIf578snRoLklYdmhm3DN08wcH93AYmLrwHg6NWdOt/b6hma\n 5xmUcIEj1c/NtBa6VKRaWJVzoe7veBOsdFNtyEzoiHoJ/bMoNlUI9IScZhFz6xIDeXec\n 7fua9EjYQ0ctgsaEHdWfPQr95BrWQI6Y/XH2jUA2pGoVG8ATQxNbGh8qBscwBGdR+hOi 9A==",
        "From": "<lironh@marvell.com>",
        "To": "<jerinj@marvell.com>, <ferruh.yigit@intel.com>",
        "CC": "<dev@dpdk.org>, Dana Vardi <danat@marvell.com>, Liron Himi\n <lironh@marvell.com>",
        "Date": "Wed, 27 Jan 2021 18:09:47 +0200",
        "Message-ID": "<20210127160948.6008-34-lironh@marvell.com>",
        "X-Mailer": "git-send-email 2.28.0",
        "In-Reply-To": "<20210127160948.6008-1-lironh@marvell.com>",
        "References": "<20210122191925.24308-1-lironh@marvell.com>\n <20210127160948.6008-1-lironh@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2021-01-27_05:2021-01-27,\n 2021-01-27 signatures=0",
        "Subject": "[dpdk-dev] [PATCH v3 33/34] net/mvpp2: update qos defaults\n parameter name",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Dana Vardi <danat@marvell.com>\n\n'global_default' is only being used for 'qos'\nso adding 'qos' into its name\n\nSigned-off-by: Dana Vardi <danat@marvell.com>\nReviewed-by: Liron Himi <lironh@marvell.com>\n---\n drivers/net/mvpp2/mrvl_ethdev.c |  2 +-\n drivers/net/mvpp2/mrvl_qos.c    | 12 ++++++------\n drivers/net/mvpp2/mrvl_qos.h    |  2 +-\n 3 files changed, 8 insertions(+), 8 deletions(-)",
    "diff": "diff --git a/drivers/net/mvpp2/mrvl_ethdev.c b/drivers/net/mvpp2/mrvl_ethdev.c\nindex a3c3552694..09da461476 100644\n--- a/drivers/net/mvpp2/mrvl_ethdev.c\n+++ b/drivers/net/mvpp2/mrvl_ethdev.c\n@@ -905,7 +905,7 @@ mrvl_dev_start(struct rte_eth_dev *dev)\n \n \t/* For default QoS config, don't start classifier. */\n \tif (mrvl_cfg  &&\n-\t    mrvl_cfg->port[dev->data->port_id].use_global_defaults == 0) {\n+\t    mrvl_cfg->port[dev->data->port_id].use_qos_global_defaults == 0) {\n \t\tret = mrvl_start_qos_mapping(priv);\n \t\tif (ret) {\n \t\t\tMRVL_LOG(ERR, \"Failed to setup QoS mapping\");\ndiff --git a/drivers/net/mvpp2/mrvl_qos.c b/drivers/net/mvpp2/mrvl_qos.c\nindex 38556b228b..a415584884 100644\n--- a/drivers/net/mvpp2/mrvl_qos.c\n+++ b/drivers/net/mvpp2/mrvl_qos.c\n@@ -321,7 +321,7 @@ parse_tc_cfg(struct rte_cfgfile *file, int port, int tc,\n \tif (rte_cfgfile_num_sections(file, sec_name, strlen(sec_name)) <= 0)\n \t\treturn 0;\n \n-\tcfg->port[port].use_global_defaults = 0;\n+\tcfg->port[port].use_qos_global_defaults = 0;\n \tentry = rte_cfgfile_get_entry(file, sec_name, MRVL_TOK_RXQ);\n \tif (entry) {\n \t\tn = get_entry_values(entry,\n@@ -718,7 +718,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)\n \t\t\tMRVL_TOK_PORT, n, MRVL_TOK_DEFAULT);\n \n \t\t/* Use global defaults, unless an override occurs */\n-\t\t(*cfg)->port[n].use_global_defaults = 1;\n+\t\t(*cfg)->port[n].use_qos_global_defaults = 1;\n \n \t\t/* Skip ports non-existing in configuration. */\n \t\tif (rte_cfgfile_num_sections(file, sec_name,\n@@ -796,7 +796,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)\n \t\tentry = rte_cfgfile_get_entry(file, sec_name,\n \t\t\t\tMRVL_TOK_MAPPING_PRIORITY);\n \t\tif (entry) {\n-\t\t\t(*cfg)->port[n].use_global_defaults = 0;\n+\t\t\t(*cfg)->port[n].use_qos_global_defaults = 0;\n \t\t\tif (!strncmp(entry, MRVL_TOK_VLAN_IP,\n \t\t\t\tsizeof(MRVL_TOK_VLAN_IP)))\n \t\t\t\t(*cfg)->port[n].mapping_priority =\n@@ -828,7 +828,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)\n \t\tentry = rte_cfgfile_get_entry(file, sec_name,\n \t\t\t\tMRVL_TOK_PLCR_DEFAULT);\n \t\tif (entry) {\n-\t\t\t(*cfg)->port[n].use_global_defaults = 0;\n+\t\t\t(*cfg)->port[n].use_qos_global_defaults = 0;\n \t\t\tif (get_val_securely(entry, &val) < 0)\n \t\t\t\treturn -1;\n \n@@ -867,7 +867,7 @@ mrvl_get_cfg(const char *key __rte_unused, const char *path, void *extra_args)\n \t\t\t\treturn -1;\n \t\t\t(*cfg)->port[n].default_tc = (uint8_t)val;\n \t\t} else {\n-\t\t\tif ((*cfg)->port[n].use_global_defaults == 0) {\n+\t\t\tif ((*cfg)->port[n].use_qos_global_defaults == 0) {\n \t\t\t\tMRVL_LOG(ERR,\n \t\t\t\t\t \"Default Traffic Class required in \"\n \t\t\t\t\t \"custom configuration!\");\n@@ -984,7 +984,7 @@ mrvl_configure_rxqs(struct mrvl_priv *priv, uint16_t portid,\n \tsize_t i, tc;\n \n \tif (mrvl_cfg == NULL ||\n-\t\tmrvl_cfg->port[portid].use_global_defaults) {\n+\t\tmrvl_cfg->port[portid].use_qos_global_defaults) {\n \t\t/*\n \t\t * No port configuration, use default: 1 TC, no QoS,\n \t\t * TC color set to green.\ndiff --git a/drivers/net/mvpp2/mrvl_qos.h b/drivers/net/mvpp2/mrvl_qos.h\nindex f2e341c372..763130bf17 100644\n--- a/drivers/net/mvpp2/mrvl_qos.h\n+++ b/drivers/net/mvpp2/mrvl_qos.h\n@@ -45,7 +45,7 @@ struct mrvl_cfg {\n \t\tuint16_t inqs;\n \t\tuint16_t outqs;\n \t\tuint8_t default_tc;\n-\t\tuint8_t use_global_defaults;\n+\t\tuint8_t use_qos_global_defaults;\n \t\tstruct pp2_cls_plcr_params policer_params;\n \t\tuint8_t setup_policer;\n \t\tuint8_t forward_bad_frames;\n",
    "prefixes": [
        "v3",
        "33/34"
    ]
}