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GET /api/patches/85914/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 85914,
    "url": "http://patches.dpdk.org/api/patches/85914/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201231072247.5719-4-pnalla@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201231072247.5719-4-pnalla@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201231072247.5719-4-pnalla@marvell.com",
    "date": "2020-12-31T07:22:35",
    "name": "[03/15] net/octeontx_ep: add device init and uninit",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "55f436fee158ab0ade937f5a789450adde67baf7",
    "submitter": {
        "id": 2074,
        "url": "http://patches.dpdk.org/api/people/2074/?format=api",
        "name": "Pradeep Nalla",
        "email": "pnalla@marvell.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201231072247.5719-4-pnalla@marvell.com/mbox/",
    "series": [
        {
            "id": 14507,
            "url": "http://patches.dpdk.org/api/series/14507/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14507",
            "date": "2020-12-31T07:22:32",
            "name": "Octeon Tx/Tx2 Endpoint pmd",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/14507/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/85914/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/85914/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (xvm-189-124.dc0.ghst.net [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F2B8DA0A00;\n\tThu, 31 Dec 2020 08:23:06 +0100 (CET)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D2094140CED;\n\tThu, 31 Dec 2020 08:23:00 +0100 (CET)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 20691140CD3\n for <dev@dpdk.org>; Thu, 31 Dec 2020 08:22:57 +0100 (CET)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id\n 0BV7G5RA022206; Wed, 30 Dec 2020 23:22:57 -0800",
            "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com with ESMTP id 35rqgehx54-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Wed, 30 Dec 2020 23:22:57 -0800",
            "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Wed, 30 Dec 2020 23:22:55 -0800",
            "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Wed, 30 Dec 2020 23:22:55 -0800",
            "from localhost.localdomain (unknown [10.111.145.157])\n by maili.marvell.com (Postfix) with ESMTP id 7B4723F703F;\n Wed, 30 Dec 2020 23:22:55 -0800 (PST)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=nofnG0OOIliSpStsmPmwA8tROxQJYR0rEjBxOAqxtSQ=;\n b=CFGXeZc+CGMP98+kxnENG1zt298GmNcxYg/nbImFZAnGKmuHBgtIxLOfZqTCaXwiUAh+\n wUFa5B5xbq9bwF6QzAv0mmku5JnssDWgFIo88S0Xx0JEgvBbPs2MxbjH5DynNXZJwu2u\n 5u4ex5nJkOTo9FT/mwELGSsObku18/RqvOegCmT4jR/v+WdwIjZwLwJJGkUSQ0yV0CxC\n jApSDjww2SBTjULyzVVk7NXNpo/q+z7Z6KRl4pRFtFB/AbqKQ/8DWPzinBAlhFL2409o\n Xma3NHVkt1Sewt6JZNdDHyyjG+ujyog8iLTuoJkUZP7f9452sPAG13yYAnYJ725DamL4 og==",
        "From": "\"Nalla, Pradeep\" <pnalla@marvell.com>",
        "To": "\"Nalla, Pradeep\" <pnalla@marvell.com>, Radha Mohan Chintakuntla\n <radhac@marvell.com>, Veerasenareddy Burru <vburru@marvell.com>, \"Anatoly\n Burakov\" <anatoly.burakov@intel.com>",
        "CC": "<jerinj@marvell.com>, <sburla@marvell.com>, <dev@dpdk.org>",
        "Date": "Thu, 31 Dec 2020 07:22:35 +0000",
        "Message-ID": "<20201231072247.5719-4-pnalla@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20201231072247.5719-1-pnalla@marvell.com>",
        "References": "<20201231072247.5719-1-pnalla@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737\n definitions=2020-12-31_02:2020-12-30,\n 2020-12-31 signatures=0",
        "Subject": "[dpdk-dev] [PATCH 03/15] net/octeontx_ep: add device init and uninit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: \"Nalla Pradeep\" <pnalla@marvell.com>\n\nAdd basic init and uninit function which includes\ninitializing fields of ethdev private structure.\n\nSigned-off-by: Nalla Pradeep <pnalla@marvell.com>\n---\n drivers/net/octeontx_ep/otx_ep_common.h | 22 ++++++\n drivers/net/octeontx_ep/otx_ep_ethdev.c | 99 ++++++++++++++++++++++++-\n 2 files changed, 117 insertions(+), 4 deletions(-)",
    "diff": "diff --git a/drivers/net/octeontx_ep/otx_ep_common.h b/drivers/net/octeontx_ep/otx_ep_common.h\nindex 7a1484f1aa..fca0c79a43 100644\n--- a/drivers/net/octeontx_ep/otx_ep_common.h\n+++ b/drivers/net/octeontx_ep/otx_ep_common.h\n@@ -4,11 +4,33 @@\n #ifndef _OTX_EP_COMMON_H_\n #define _OTX_EP_COMMON_H_\n \n+#define otx_ep_printf(level, fmt, args...)\t\t\\\n+\trte_log(RTE_LOG_ ## level, RTE_LOGTYPE_PMD,\t\t\\\n+\t\t fmt, ##args)\n+\n+#define otx_ep_info(fmt, args...)\t\t\t\t\\\n+\totx_ep_printf(INFO, fmt, ##args)\n+\n+#define otx_ep_err(fmt, args...)\t\t\t\t\\\n+\totx_ep_printf(ERR, fmt, ##args)\n+\n+#define otx_ep_dbg(fmt, args...)\t\t\t\t\\\n+\totx_ep_printf(DEBUG, fmt, ##args)\n+\n /* OTX_EP EP VF device data structure */\n struct otx_ep_device {\n \t/* PCI device pointer */\n \tstruct rte_pci_device *pdev;\n+\tuint16_t chip_id;\n+\tuint16_t vf_num;\n \n \tstruct rte_eth_dev *eth_dev;\n+\n+\tint port_id;\n+\n+\t/* Memory mapped h/w address */\n+\tuint8_t *hw_addr;\n+\n+\tint port_configured;\n };\n #endif  /* _OTX_EP_COMMON_H_ */\ndiff --git a/drivers/net/octeontx_ep/otx_ep_ethdev.c b/drivers/net/octeontx_ep/otx_ep_ethdev.c\nindex 960c4f321e..6012c3fe9d 100644\n--- a/drivers/net/octeontx_ep/otx_ep_ethdev.c\n+++ b/drivers/net/octeontx_ep/otx_ep_ethdev.c\n@@ -10,20 +10,111 @@\n #include \"otx_ep_common.h\"\n #include \"otx_ep_vf.h\"\n \n+#define OTX_EP_DEV(_eth_dev)            ((_eth_dev)->data->dev_private)\n+static int\n+otx_ep_chip_specific_setup(struct otx_ep_device *otx_epvf)\n+{\n+\tstruct rte_pci_device *pdev = otx_epvf->pdev;\n+\tuint32_t dev_id = pdev->id.device_id;\n+\tint ret;\n+\n+\tswitch (dev_id) {\n+\tcase PCI_DEVID_OCTEONTX_EP_VF:\n+\t\totx_epvf->chip_id = PCI_DEVID_OCTEONTX_EP_VF;\n+\t\tbreak;\n+\tcase PCI_DEVID_OCTEONTX2_EP_NET_VF:\n+\tcase PCI_DEVID_98XX_EP_NET_VF:\n+\t\totx_epvf->chip_id = dev_id;\n+\t\tbreak;\n+\tdefault:\n+\t\totx_ep_err(\"Unsupported device\\n\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (!ret)\n+\t\totx_ep_info(\"OTX_EP dev_id[%d]\\n\", dev_id);\n+\n+\treturn ret;\n+}\n+\n+/* OTX_EP VF device initialization */\n+static int\n+otx_epdev_init(struct otx_ep_device *otx_epvf)\n+{\n+\tif (otx_ep_chip_specific_setup(otx_epvf)) {\n+\t\totx_ep_err(\"Chip specific setup failed\\n\");\n+\t\tgoto setup_fail;\n+\t}\n+\n+\treturn 0;\n+\n+setup_fail:\n+\treturn -ENOMEM;\n+}\n+\n+\n static int\n otx_ep_eth_dev_uninit(struct rte_eth_dev *eth_dev)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);\n+\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\totx_epvf->port_configured = 0;\n \n-\treturn -ENODEV;\n+\tif (eth_dev->data->mac_addrs != NULL)\n+\t\trte_free(eth_dev->data->mac_addrs);\n+\n+\treturn 0;\n }\n \n+\n+\n static int\n otx_ep_eth_dev_init(struct rte_eth_dev *eth_dev)\n {\n-\tRTE_SET_USED(eth_dev);\n+\tstruct rte_pci_device *pdev = RTE_ETH_DEV_TO_PCI(eth_dev);\n+\tstruct otx_ep_device *otx_epvf = OTX_EP_DEV(eth_dev);\n+\tint vf_id;\n+\tunsigned char vf_mac_addr[RTE_ETHER_ADDR_LEN];\n+\n+\t/* Single process support */\n+\tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n+\t\treturn 0;\n+\n+\trte_eth_copy_pci_info(eth_dev, pdev);\n+\n+\tif (pdev->mem_resource[0].addr) {\n+\t\totx_ep_info(\"OTX_EP_EP BAR0 is mapped:\\n\");\n+\t} else {\n+\t\totx_ep_err(\"OTX_EP_EP: Failed to map device BARs\\n\");\n+\t\totx_ep_err(\"BAR0 %p\\n BAR2 %p\",\n+\t\t\tpdev->mem_resource[0].addr,\n+\t\t\tpdev->mem_resource[2].addr);\n+\t\treturn -ENODEV;\n+\t}\n+\totx_epvf->eth_dev = eth_dev;\n+\totx_epvf->port_id = eth_dev->data->port_id;\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"otx_ep\", RTE_ETHER_ADDR_LEN, 0);\n+\tif (eth_dev->data->mac_addrs == NULL) {\n+\t\totx_ep_err(\"MAC addresses memory allocation failed\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\trte_eth_random_addr(vf_mac_addr);\n+\tmemcpy(eth_dev->data->mac_addrs, vf_mac_addr, RTE_ETHER_ADDR_LEN);\n+\totx_epvf->hw_addr = pdev->mem_resource[0].addr;\n+\totx_epvf->pdev = pdev;\n+\n+\t/* Discover the VF number being probed */\n+\tvf_id = ((pdev->addr.devid & 0x1F) << 3) |\n+\t\t (pdev->addr.function & 0x7);\n+\n+\tvf_id -= 1;\n+\totx_epvf->vf_num = vf_id;\n+\totx_epdev_init(otx_epvf);\n+\totx_epvf->port_configured = 0;\n \n-\treturn -ENODEV;\n+\treturn 0;\n }\n \n static int\n",
    "prefixes": [
        "03/15"
    ]
}