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GET /api/patches/85749/?format=api
{ "id": 85749, "url": "http://patches.dpdk.org/api/patches/85749/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1609085183-25229-8-git-send-email-shirik@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1609085183-25229-8-git-send-email-shirik@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1609085183-25229-8-git-send-email-shirik@nvidia.com", "date": "2020-12-27T16:06:22", "name": "[7/8] net/mlx5: add GENEVE TLV option flow translation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4c9fe416592153e0d5e231ed61c08ccd96d40fdb", "submitter": { "id": 1894, "url": "http://patches.dpdk.org/api/people/1894/?format=api", "name": "Shiri Kuzin", "email": "shirik@nvidia.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1609085183-25229-8-git-send-email-shirik@nvidia.com/mbox/", "series": [ { "id": 14470, "url": "http://patches.dpdk.org/api/series/14470/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14470", "date": "2020-12-27T16:06:15", "name": "ethdev: introduce GENEVE header TLV option item", "version": 1, "mbox": "http://patches.dpdk.org/series/14470/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/85749/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/85749/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 57CF3A09FF;\n\tSun, 27 Dec 2020 17:08:55 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id C3BD9CA5E;\n\tSun, 27 Dec 2020 17:07:04 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id DFF74CA5C\n for <dev@dpdk.org>; Sun, 27 Dec 2020 17:07:02 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n shirik@nvidia.com) with SMTP; 27 Dec 2020 18:06:58 +0200", "from nvidia.com (nps-server-11.mtl.labs.mlnx [10.7.12.71])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BRG6VZY006105;\n Sun, 27 Dec 2020 18:06:58 +0200" ], "From": "Shiri Kuzin <shirik@nvidia.com>", "To": "dev@dpdk.org", "Cc": "viacheslavo@nvidia.com, adrien.mazarguil@6wind.com, orika@nvidia.com,\n ferruh.yigit@intel.com, thomas@monjalon.net, rasland@nvidia.com", "Date": "Sun, 27 Dec 2020 18:06:22 +0200", "Message-Id": "<1609085183-25229-8-git-send-email-shirik@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1609085183-25229-1-git-send-email-shirik@nvidia.com>", "References": "<1609085183-25229-1-git-send-email-shirik@nvidia.com>", "Subject": "[dpdk-dev] [PATCH 7/8] net/mlx5: add GENEVE TLV option flow\n\ttranslation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The GENEVE TLV option matching flows must be created\nusing a translation function.\n\nThis function checks whether we already created a Devx\nobject for the matching and either creates the objects\nor updates the reference counter.\n\nSigned-off-by: Shiri Kuzin <shirik@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_dv.c | 70 +++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 70 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 6db2789..f78622d 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -7316,6 +7316,65 @@ struct mlx5_hlist_entry *\n }\n \n /**\n+ * Add Geneve TLV option item to matcher.\n+ *\n+ * @param[in, out] dev\n+ * Pointer to rte_eth_dev structure.\n+ * @param[in, out] matcher\n+ * Flow matcher.\n+ * @param[in, out] key\n+ * Flow matcher value.\n+ * @param[in] item\n+ * Flow pattern to translate.\n+ * @param[out] error\n+ * Pointer to error structure.\n+ */\n+static int\n+flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,\n+\t\t\t\t void *key, const struct rte_flow_item *item,\n+\t\t\t\t struct rte_flow_error *error)\n+{\n+\tconst struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;\n+\tconst struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;\n+\tvoid *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,\n+\t\t\tmisc_parameters_3);\n+\tvoid *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);\n+\trte_be32_t opt_data_key = 0, opt_data_mask = 0;\n+\tint ret = 0;\n+\n+\tif (!geneve_opt_v)\n+\t\treturn -1;\n+\tif (!geneve_opt_m)\n+\t\tgeneve_opt_m = &rte_flow_item_geneve_opt_mask;\n+\tret = flow_dev_geneve_tlv_option_resource_register(dev, item,\n+\t\t\t\t\t\t\t error);\n+\tif (ret) {\n+\t\tDRV_LOG(ERR, \"Failed to create geneve_tlv_obj\");\n+\t\treturn ret;\n+\t}\n+\t/* Set the data. */\n+\tif (geneve_opt_v->data) {\n+\t\tmemcpy(&opt_data_key, geneve_opt_v->data,\n+\t\t\tRTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),\n+\t\t\t\tsizeof(opt_data_key)));\n+\t\tMLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=\n+\t\t\t\tsizeof(opt_data_key));\n+\t\tmemcpy(&opt_data_mask, geneve_opt_m->data,\n+\t\t\tRTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),\n+\t\t\t\tsizeof(opt_data_mask)));\n+\t\tMLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=\n+\t\t\t\tsizeof(opt_data_mask));\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_m,\n+\t\t\t\tgeneve_tlv_option_0_data,\n+\t\t\t\trte_be_to_cpu_32(opt_data_mask));\n+\t\tMLX5_SET(fte_match_set_misc3, misc3_v,\n+\t\t\t\tgeneve_tlv_option_0_data,\n+\t\t\trte_be_to_cpu_32(opt_data_key & opt_data_mask));\n+\t}\n+\treturn ret;\n+}\n+\n+/**\n * Add MPLS item to matcher and to the value.\n *\n * @param[in, out] matcher\n@@ -10559,6 +10618,17 @@ struct mlx5_cache_entry *\n \t\t\tmatcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);\n \t\t\tlast_item = MLX5_FLOW_LAYER_GENEVE;\n \t\t\tbreak;\n+\t\tcase RTE_FLOW_ITEM_TYPE_GENEVE_OPT:\n+\t\t\tret = flow_dv_translate_item_geneve_opt(dev, match_mask,\n+\t\t\t\t\t\t\t match_value,\n+\t\t\t\t\t\t\t items, error);\n+\t\t\tif (ret)\n+\t\t\t\treturn rte_flow_error_set(error, -ret,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ITEM, NULL,\n+\t\t\t\t\t\"cannot create GENEVE TLV option\");\n+\t\t\tflow->geneve_tlv_option = 1;\n+\t\t\tlast_item = MLX5_FLOW_LAYER_GENEVE_OPT;\n+\t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_MPLS:\n \t\t\tflow_dv_translate_item_mpls(match_mask, match_value,\n \t\t\t\t\t\t items, last_item, tunnel);\n", "prefixes": [ "7/8" ] }