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{
    "id": 85372,
    "url": "http://patches.dpdk.org/api/patches/85372/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201217173037.11396-5-talshn@nvidia.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20201217173037.11396-5-talshn@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20201217173037.11396-5-talshn@nvidia.com",
    "date": "2020-12-17T17:30:06",
    "name": "[04/35] common/mlx5/windows: add DevX UAR getters",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "8c62dd2b5230b071255009e7b9f658ea65fd8233",
    "submitter": {
        "id": 1893,
        "url": "http://patches.dpdk.org/api/people/1893/?format=api",
        "name": "Tal Shnaiderman",
        "email": "talshn@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "http://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201217173037.11396-5-talshn@nvidia.com/mbox/",
    "series": [
        {
            "id": 14351,
            "url": "http://patches.dpdk.org/api/series/14351/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14351",
            "date": "2020-12-17T17:30:04",
            "name": "mlx5 Windows support - part #6",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/14351/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/85372/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/85372/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8F70CA09F6;\n\tThu, 17 Dec 2020 18:44:52 +0100 (CET)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 882C0CCEC;\n\tThu, 17 Dec 2020 18:34:02 +0100 (CET)",
            "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 513CECA41\n for <dev@dpdk.org>; Thu, 17 Dec 2020 18:33:09 +0100 (CET)",
            "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 17 Dec 2020 19:33:04 +0200",
            "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BHHX45P021771;\n Thu, 17 Dec 2020 19:33:04 +0200"
        ],
        "From": "Tal Shnaiderman <talshn@nvidia.com>",
        "To": "dev@dpdk.org",
        "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com",
        "Date": "Thu, 17 Dec 2020 19:30:06 +0200",
        "Message-Id": "<20201217173037.11396-5-talshn@nvidia.com>",
        "X-Mailer": "git-send-email 2.16.1.windows.4",
        "In-Reply-To": "<20201217173037.11396-1-talshn@nvidia.com>",
        "References": "<20201217173037.11396-1-talshn@nvidia.com>",
        "Subject": "[dpdk-dev] [PATCH 04/35] common/mlx5/windows: add DevX UAR getters",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Ophir Munk <ophirmu@nvidia.com>\n\nThe following getters are added: mlx5_os_get_devx_uar_mmap_offset,\nmlx5_os_get_devx_uar_base_addr, mlx5_os_get_devx_uar_reg_addr,\nmlx5_os_get_devx_uar_page_id.  This commit is the Windows equivalent of\nthe Linux implementation in [1].\n\n[1]\ncommit 8638e19a10aa (\"net/mlx5: remove more DV dependencies\")\n\nSigned-off-by: Ophir Munk <ophirmu@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/windows/mlx5_common_os.h | 75 ++++++++++++++++++++++++++++\n 1 file changed, 75 insertions(+)",
    "diff": "diff --git a/drivers/common/mlx5/windows/mlx5_common_os.h b/drivers/common/mlx5/windows/mlx5_common_os.h\nindex ba166412cc..ac5b848bc2 100644\n--- a/drivers/common/mlx5/windows/mlx5_common_os.h\n+++ b/drivers/common/mlx5/windows/mlx5_common_os.h\n@@ -6,6 +6,7 @@\n #define RTE_PMD_MLX5_COMMON_OS_H_\n \n #include <stdio.h>\n+#include <sys/types.h>\n \n #include <rte_errno.h>\n \n@@ -15,6 +16,8 @@\n #include \"mlx5_common_mr.h\"\n #include \"mlx5_win_ext.h\"\n \n+#define MLX5_BF_OFFSET 0x800\n+\n /**\n  * This API allocates aligned or non-aligned memory.  The free can be on either\n  * aligned or nonaligned memory.  To be protected - even though there may be no\n@@ -144,6 +147,78 @@ mlx5_os_get_umem_id(void *umem)\n \treturn ((struct mlx5_devx_umem *)umem)->umem_id;\n }\n \n+/**\n+ * Get mmap offset. Given a pointer to an DevX UAR object of type\n+ * 'struct mlx5dv_devx_uar *' - return its mmap offset.\n+ * In Windows, mmap_offset is unused.\n+ *\n+ * @param[in] uar\n+ *    Pointer to UAR object.\n+ *\n+ * @return\n+ *    0 as mmap_offset is unused\n+ */\n+static inline off_t\n+mlx5_os_get_devx_uar_mmap_offset(void *uar)\n+{\n+\tRTE_SET_USED(uar);\n+\treturn 0;\n+}\n+\n+/**\n+ * Get base addr pointer. Given a pointer to an UAR object of type\n+ * 'struct mlx5dv_devx_uar *' - return its base address.\n+ *\n+ * @param[in] uar\n+ *    Pointer to an UAR object.\n+ *\n+ * @return\n+ *    The base address if UAR is valid, NULL otherwise.\n+ */\n+static inline void *\n+mlx5_os_get_devx_uar_base_addr(void *uar)\n+{\n+\tif (!uar)\n+\t\treturn NULL;\n+\treturn ((devx_uar_handle *)uar)->uar_page;\n+}\n+\n+/**\n+ * Get reg addr pointer. Given a pointer to an UAR object of type\n+ * 'struct mlx5dv_devx_uar *' - return its reg address.\n+ *\n+ * @param[in] uar\n+ *    Pointer to an UAR object.\n+ *\n+ * @return\n+ *    The reg address if UAR is valid, NULL otherwise.\n+ */\n+static inline void *\n+mlx5_os_get_devx_uar_reg_addr(void *uar)\n+{\n+\tif (!uar)\n+\t\treturn NULL;\n+\treturn ((char *)((devx_uar_handle *)uar)->uar_page) + MLX5_BF_OFFSET;\n+}\n+\n+/**\n+ * Get page id. Given a pointer to an UAR object of type\n+ * 'struct mlx5dv_devx_uar *' - return its page id.\n+ *\n+ * @param[in] uar\n+ *    Pointer to an UAR object.\n+ *\n+ * @return\n+ *    The page id if UAR is valid, 0 otherwise.\n+ */\n+static inline uint32_t\n+mlx5_os_get_devx_uar_page_id(void *uar)\n+{\n+\tif (!uar)\n+\t\treturn 0;\n+\treturn ((devx_uar_handle *)uar)->uar_index;\n+}\n+\n void *mlx5_os_alloc_pd(void *ctx);\n int mlx5_os_dealloc_pd(void *pd);\n void *mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access);\n",
    "prefixes": [
        "04/35"
    ]
}