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GET /api/patches/85314/?format=api
{ "id": 85314, "url": "http://patches.dpdk.org/api/patches/85314/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1608205475-20067-18-git-send-email-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1608205475-20067-18-git-send-email-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1608205475-20067-18-git-send-email-michaelba@nvidia.com", "date": "2020-12-17T11:44:35", "name": "[17/17] common/mlx5: remove doorbell allocation API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5687e5c55a1df425407aa99dbea4e2e40d67c4d0", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1608205475-20067-18-git-send-email-michaelba@nvidia.com/mbox/", "series": [ { "id": 14348, "url": "http://patches.dpdk.org/api/series/14348/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14348", "date": "2020-12-17T11:44:23", "name": "common/mlx5: share DevX resources creations", "version": 1, "mbox": "http://patches.dpdk.org/series/14348/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/85314/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/85314/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2A214A09F6;\n\tThu, 17 Dec 2020 12:47:09 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 6592ACA5A;\n\tThu, 17 Dec 2020 12:45:09 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id A13E0CA20\n for <dev@dpdk.org>; Thu, 17 Dec 2020 12:44:56 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n michaelba@nvidia.com) with SMTP; 17 Dec 2020 13:44:51 +0200", "from nvidia.com (pegasus07.mtr.labs.mlnx [10.210.16.112])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BHBio2g004524;\n Thu, 17 Dec 2020 13:44:51 +0200" ], "From": "Michael Baum <michaelba@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Date": "Thu, 17 Dec 2020 11:44:35 +0000", "Message-Id": "<1608205475-20067-18-git-send-email-michaelba@nvidia.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1608205475-20067-1-git-send-email-michaelba@nvidia.com>", "References": "<1608205475-20067-1-git-send-email-michaelba@nvidia.com>", "Subject": "[dpdk-dev] [PATCH 17/17] common/mlx5: remove doorbell allocation API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The mlx5_devx_dbr_page structure was used to allocate and release the\numem of the doorbells.\nSince doorbell and buffer have used same umem, this structure is\nuseless.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common.c | 122 --------------------------------------\n drivers/common/mlx5/mlx5_common.h | 23 -------\n 2 files changed, 145 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex 0445132..c26a2cf 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -8,12 +8,10 @@\n \n #include <rte_errno.h>\n #include <rte_mempool.h>\n-#include <rte_malloc.h>\n \n #include \"mlx5_common.h\"\n #include \"mlx5_common_os.h\"\n #include \"mlx5_common_utils.h\"\n-#include \"mlx5_malloc.h\"\n #include \"mlx5_common_pci.h\"\n \n int mlx5_common_logtype;\n@@ -126,126 +124,6 @@ static inline void mlx5_cpu_id(unsigned int level,\n }\n \n /**\n- * Allocate page of door-bells and register it using DevX API.\n- *\n- * @param [in] ctx\n- * Pointer to the device context.\n- *\n- * @return\n- * Pointer to new page on success, NULL otherwise.\n- */\n-static struct mlx5_devx_dbr_page *\n-mlx5_alloc_dbr_page(void *ctx)\n-{\n-\tstruct mlx5_devx_dbr_page *page;\n-\n-\t/* Allocate space for door-bell page and management data. */\n-\tpage = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO,\n-\t\t\t sizeof(struct mlx5_devx_dbr_page),\n-\t\t\t RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);\n-\tif (!page) {\n-\t\tDRV_LOG(ERR, \"cannot allocate dbr page\");\n-\t\treturn NULL;\n-\t}\n-\t/* Register allocated memory. */\n-\tpage->umem = mlx5_glue->devx_umem_reg(ctx, page->dbrs,\n-\t\t\t\t\t MLX5_DBR_PAGE_SIZE, 0);\n-\tif (!page->umem) {\n-\t\tDRV_LOG(ERR, \"cannot umem reg dbr page\");\n-\t\tmlx5_free(page);\n-\t\treturn NULL;\n-\t}\n-\treturn page;\n-}\n-\n-/**\n- * Find the next available door-bell, allocate new page if needed.\n- *\n- * @param [in] ctx\n- * Pointer to device context.\n- * @param [in] head\n- * Pointer to the head of dbr pages list.\n- * @param [out] dbr_page\n- * Door-bell page containing the page data.\n- *\n- * @return\n- * Door-bell address offset on success, a negative error value otherwise.\n- */\n-int64_t\n-mlx5_get_dbr(void *ctx, struct mlx5_dbr_page_list *head,\n-\t struct mlx5_devx_dbr_page **dbr_page)\n-{\n-\tstruct mlx5_devx_dbr_page *page = NULL;\n-\tuint32_t i, j;\n-\n-\tLIST_FOREACH(page, head, next)\n-\t\tif (page->dbr_count < MLX5_DBR_PER_PAGE)\n-\t\t\tbreak;\n-\tif (!page) { /* No page with free door-bell exists. */\n-\t\tpage = mlx5_alloc_dbr_page(ctx);\n-\t\tif (!page) /* Failed to allocate new page. */\n-\t\t\treturn (-1);\n-\t\tLIST_INSERT_HEAD(head, page, next);\n-\t}\n-\t/* Loop to find bitmap part with clear bit. */\n-\tfor (i = 0;\n-\t i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;\n-\t i++)\n-\t\t; /* Empty. */\n-\t/* Find the first clear bit. */\n-\tMLX5_ASSERT(i < MLX5_DBR_BITMAP_SIZE);\n-\tj = rte_bsf64(~page->dbr_bitmap[i]);\n-\tpage->dbr_bitmap[i] |= (UINT64_C(1) << j);\n-\tpage->dbr_count++;\n-\t*dbr_page = page;\n-\treturn (i * CHAR_BIT * sizeof(uint64_t) + j) * MLX5_DBR_SIZE;\n-}\n-\n-/**\n- * Release a door-bell record.\n- *\n- * @param [in] head\n- * Pointer to the head of dbr pages list.\n- * @param [in] umem_id\n- * UMEM ID of page containing the door-bell record to release.\n- * @param [in] offset\n- * Offset of door-bell record in page.\n- *\n- * @return\n- * 0 on success, a negative error value otherwise.\n- */\n-int32_t\n-mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id,\n-\t\t uint64_t offset)\n-{\n-\tstruct mlx5_devx_dbr_page *page = NULL;\n-\tint ret = 0;\n-\n-\tLIST_FOREACH(page, head, next)\n-\t\t/* Find the page this address belongs to. */\n-\t\tif (mlx5_os_get_umem_id(page->umem) == umem_id)\n-\t\t\tbreak;\n-\tif (!page)\n-\t\treturn -EINVAL;\n-\tpage->dbr_count--;\n-\tif (!page->dbr_count) {\n-\t\t/* Page not used, free it and remove from list. */\n-\t\tLIST_REMOVE(page, next);\n-\t\tif (page->umem)\n-\t\t\tret = -mlx5_glue->devx_umem_dereg(page->umem);\n-\t\tmlx5_free(page);\n-\t} else {\n-\t\t/* Mark in bitmap that this door-bell is not in use. */\n-\t\toffset /= MLX5_DBR_SIZE;\n-\t\tint i = offset / 64;\n-\t\tint j = offset % 64;\n-\n-\t\tpage->dbr_bitmap[i] &= ~(UINT64_C(1) << j);\n-\t}\n-\treturn ret;\n-}\n-\n-/**\n * Allocate the User Access Region with DevX on specified device.\n *\n * @param [in] ctx\ndiff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h\nindex a484b74..e35188d 100644\n--- a/drivers/common/mlx5/mlx5_common.h\n+++ b/drivers/common/mlx5/mlx5_common.h\n@@ -220,21 +220,6 @@ enum mlx5_class {\n };\n \n #define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE\n-#define MLX5_DBR_PER_PAGE 64\n-/* Must be >= CHAR_BIT * sizeof(uint64_t) */\n-#define MLX5_DBR_PAGE_SIZE (MLX5_DBR_PER_PAGE * MLX5_DBR_SIZE)\n-/* Page size must be >= 512. */\n-#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / (CHAR_BIT * sizeof(uint64_t)))\n-\n-struct mlx5_devx_dbr_page {\n-\t/* Door-bell records, must be first member in structure. */\n-\tuint8_t dbrs[MLX5_DBR_PAGE_SIZE];\n-\tLIST_ENTRY(mlx5_devx_dbr_page) next; /* Pointer to the next element. */\n-\tvoid *umem;\n-\tuint32_t dbr_count; /* Number of door-bell records in use. */\n-\t/* 1 bit marks matching door-bell is in use. */\n-\tuint64_t dbr_bitmap[MLX5_DBR_BITMAP_SIZE];\n-};\n \n /* devX creation object */\n struct mlx5_devx_obj {\n@@ -249,19 +234,11 @@ struct mlx5_klm {\n \tuint64_t address;\n };\n \n-LIST_HEAD(mlx5_dbr_page_list, mlx5_devx_dbr_page);\n-\n __rte_internal\n void mlx5_translate_port_name(const char *port_name_in,\n \t\t\t struct mlx5_switch_info *port_info_out);\n void mlx5_glue_constructor(void);\n __rte_internal\n-int64_t mlx5_get_dbr(void *ctx, struct mlx5_dbr_page_list *head,\n-\t\t struct mlx5_devx_dbr_page **dbr_page);\n-__rte_internal\n-int32_t mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id,\n-\t\t\t uint64_t offset);\n-__rte_internal\n void *mlx5_devx_alloc_uar(void *ctx, int mapping);\n extern uint8_t haswell_broadwell_cpu;\n \n", "prefixes": [ "17/17" ] }