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GET /api/patches/85079/?format=api
{ "id": 85079, "url": "http://patches.dpdk.org/api/patches/85079/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201213102056.11380-33-talshn@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201213102056.11380-33-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201213102056.11380-33-talshn@nvidia.com", "date": "2020-12-13T10:20:56", "name": "[v3,32/32] net/mlx5: refactor eth dev ops for Windows", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c37c2b19eb925e9aced75c44ca262dd32d6192c3", "submitter": { "id": 1893, "url": "http://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201213102056.11380-33-talshn@nvidia.com/mbox/", "series": [ { "id": 14276, "url": "http://patches.dpdk.org/api/series/14276/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14276", "date": "2020-12-13T10:20:24", "name": "mlx5 Windows support - part #5", "version": 3, "mbox": "http://patches.dpdk.org/series/14276/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/85079/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/85079/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5A0D4A04B5;\n\tSun, 13 Dec 2020 11:32:07 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E0D48CAD6;\n\tSun, 13 Dec 2020 11:22:35 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id F2F86C9BE\n for <dev@dpdk.org>; Sun, 13 Dec 2020 11:21:48 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 13 Dec 2020 12:21:44 +0200", "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BDALe1w018562;\n Sun, 13 Dec 2020 12:21:44 +0200" ], "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com", "Date": "Sun, 13 Dec 2020 12:20:56 +0200", "Message-Id": "<20201213102056.11380-33-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20201213102056.11380-1-talshn@nvidia.com>", "References": "<20201210150648.8784-2-talshn@nvidia.com>\n <20201213102056.11380-1-talshn@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v3 32/32] net/mlx5: refactor eth dev ops for\n\tWindows", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ophir Munk <ophirmu@nvidia.com>\n\nThere are two types of eth_dev_ops used under Windows: primary and\nisolate mode. Their function calls initialization is added to the OS\nspecific file mlx5_os.c. Secondary process eth_dev_ops is nullified.\n\nSigned-off-by: Ophir Munk <ophirmu@nvidia.com>\n---\n drivers/net/mlx5/windows/mlx5_os.c | 108 +++++++++++++++++++++++++++++++++++++\n 1 file changed, 108 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c\nindex ccf0bc3be9..43665bff7f 100644\n--- a/drivers/net/mlx5/windows/mlx5_os.c\n+++ b/drivers/net/mlx5/windows/mlx5_os.c\n@@ -296,3 +296,111 @@ mlx5_os_set_allmulti(struct rte_eth_dev *dev, int enable)\n }\n \n const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops = {0};\n+\n+const struct eth_dev_ops mlx5_os_dev_ops = {\n+\t.dev_configure = mlx5_dev_configure,\n+\t.dev_start = mlx5_dev_start,\n+\t.dev_stop = mlx5_dev_stop,\n+\t.dev_close = mlx5_dev_close,\n+\t.mtu_set = mlx5_dev_set_mtu,\n+\t.link_update = mlx5_link_update,\n+\t.stats_get = mlx5_stats_get,\n+\t.stats_reset = mlx5_stats_reset,\n+\t.dev_infos_get = mlx5_dev_infos_get,\n+\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n+\t.promiscuous_enable = mlx5_promiscuous_enable,\n+\t.promiscuous_disable = mlx5_promiscuous_disable,\n+\t.allmulticast_enable = mlx5_allmulticast_enable,\n+\t.allmulticast_disable = mlx5_allmulticast_disable,\n+\t.xstats_get = mlx5_xstats_get,\n+\t.xstats_reset = mlx5_xstats_reset,\n+\t.xstats_get_names = mlx5_xstats_get_names,\n+\t.fw_version_get = mlx5_fw_version_get,\n+\t.read_clock = mlx5_read_clock,\n+\t.vlan_filter_set = mlx5_vlan_filter_set,\n+\t.rx_queue_setup = mlx5_rx_queue_setup,\n+\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n+\t.tx_queue_setup = mlx5_tx_queue_setup,\n+\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n+\t.rx_queue_release = mlx5_rx_queue_release,\n+\t.tx_queue_release = mlx5_tx_queue_release,\n+\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n+\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n+\t.mac_addr_remove = mlx5_mac_addr_remove,\n+\t.mac_addr_add = mlx5_mac_addr_add,\n+\t.mac_addr_set = mlx5_mac_addr_set,\n+\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n+\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n+\t.vlan_offload_set = mlx5_vlan_offload_set,\n+\t.reta_update = mlx5_dev_rss_reta_update,\n+\t.reta_query = mlx5_dev_rss_reta_query,\n+\t.rss_hash_update = mlx5_rss_hash_update,\n+\t.rss_hash_conf_get = mlx5_rss_hash_conf_get,\n+\t.filter_ctrl = mlx5_dev_filter_ctrl,\n+\t.rxq_info_get = mlx5_rxq_info_get,\n+\t.txq_info_get = mlx5_txq_info_get,\n+\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n+\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n+\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n+\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n+\t.is_removed = mlx5_is_removed,\n+\t.udp_tunnel_port_add = mlx5_udp_tunnel_port_add,\n+\t.get_module_info = mlx5_get_module_info,\n+\t.get_module_eeprom = mlx5_get_module_eeprom,\n+\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n+\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n+};\n+\n+/* Available operations from secondary process. */\n+const struct eth_dev_ops mlx5_os_dev_sec_ops = {0};\n+\n+/* Available operations in flow isolated mode. */\n+const struct eth_dev_ops mlx5_os_dev_ops_isolate = {\n+\t.dev_configure = mlx5_dev_configure,\n+\t.dev_start = mlx5_dev_start,\n+\t.dev_stop = mlx5_dev_stop,\n+\t.dev_close = mlx5_dev_close,\n+\t.mtu_set = mlx5_dev_set_mtu,\n+\t.link_update = mlx5_link_update,\n+\t.stats_get = mlx5_stats_get,\n+\t.stats_reset = mlx5_stats_reset,\n+\t.dev_infos_get = mlx5_dev_infos_get,\n+\t.dev_set_link_down = mlx5_set_link_down,\n+\t.dev_set_link_up = mlx5_set_link_up,\n+\t.promiscuous_enable = mlx5_promiscuous_enable,\n+\t.promiscuous_disable = mlx5_promiscuous_disable,\n+\t.allmulticast_enable = mlx5_allmulticast_enable,\n+\t.allmulticast_disable = mlx5_allmulticast_disable,\n+\t.xstats_get = mlx5_xstats_get,\n+\t.xstats_reset = mlx5_xstats_reset,\n+\t.xstats_get_names = mlx5_xstats_get_names,\n+\t.fw_version_get = mlx5_fw_version_get,\n+\t.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,\n+\t.vlan_filter_set = mlx5_vlan_filter_set,\n+\t.rx_queue_setup = mlx5_rx_queue_setup,\n+\t.rx_hairpin_queue_setup = mlx5_rx_hairpin_queue_setup,\n+\t.tx_queue_setup = mlx5_tx_queue_setup,\n+\t.tx_hairpin_queue_setup = mlx5_tx_hairpin_queue_setup,\n+\t.rx_queue_release = mlx5_rx_queue_release,\n+\t.tx_queue_release = mlx5_tx_queue_release,\n+\t.flow_ctrl_get = mlx5_dev_get_flow_ctrl,\n+\t.flow_ctrl_set = mlx5_dev_set_flow_ctrl,\n+\t.mac_addr_remove = mlx5_mac_addr_remove,\n+\t.mac_addr_add = mlx5_mac_addr_add,\n+\t.mac_addr_set = mlx5_mac_addr_set,\n+\t.set_mc_addr_list = mlx5_set_mc_addr_list,\n+\t.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,\n+\t.vlan_offload_set = mlx5_vlan_offload_set,\n+\t.filter_ctrl = mlx5_dev_filter_ctrl,\n+\t.rxq_info_get = mlx5_rxq_info_get,\n+\t.txq_info_get = mlx5_txq_info_get,\n+\t.rx_burst_mode_get = mlx5_rx_burst_mode_get,\n+\t.tx_burst_mode_get = mlx5_tx_burst_mode_get,\n+\t.rx_queue_intr_enable = mlx5_rx_intr_enable,\n+\t.rx_queue_intr_disable = mlx5_rx_intr_disable,\n+\t.is_removed = mlx5_is_removed,\n+\t.get_module_info = mlx5_get_module_info,\n+\t.get_module_eeprom = mlx5_get_module_eeprom,\n+\t.hairpin_cap_get = mlx5_hairpin_cap_get,\n+\t.mtr_ops_get = mlx5_flow_meter_ops_get,\n+};\n", "prefixes": [ "v3", "32/32" ] }