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GET /api/patches/84954/?format=api
{ "id": 84954, "url": "http://patches.dpdk.org/api/patches/84954/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20201210150648.8784-11-talshn@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201210150648.8784-11-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201210150648.8784-11-talshn@nvidia.com", "date": "2020-12-10T15:06:25", "name": "[v2,10/33] net/mlx5: wrap glue reg/dereg UMEM with OS calls", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "b48fd887abfdf5d505e55104a4d74f63e9b0101b", "submitter": { "id": 1893, "url": "http://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20201210150648.8784-11-talshn@nvidia.com/mbox/", "series": [ { "id": 14240, "url": "http://patches.dpdk.org/api/series/14240/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=14240", "date": "2020-12-10T15:06:17", "name": "mlx5 Windows support - part #5", "version": 2, "mbox": "http://patches.dpdk.org/series/14240/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/84954/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/84954/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 73F6BA04DB;\n\tThu, 10 Dec 2020 16:08:57 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 987A3C9A6;\n\tThu, 10 Dec 2020 16:07:56 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id CC34CC956\n for <dev@dpdk.org>; Thu, 10 Dec 2020 16:07:47 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n talshn@nvidia.com) with SMTP; 10 Dec 2020 17:07:45 +0200", "from nvidia.com (l-wincomp04-vm.mtl.labs.mlnx [10.237.1.5])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0BAF7h92007994;\n Thu, 10 Dec 2020 17:07:45 +0200" ], "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "dev@dpdk.org", "Cc": "thomas@monjalon.net, matan@nvidia.com, rasland@nvidia.com,\n ophirmu@nvidia.com", "Date": "Thu, 10 Dec 2020 17:06:25 +0200", "Message-Id": "<20201210150648.8784-11-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20201210150648.8784-1-talshn@nvidia.com>", "References": "<20201027232335.31427-2-ophirmu@nvidia.com>\n <20201210150648.8784-1-talshn@nvidia.com>", "Subject": "[dpdk-dev] [PATCH v2 10/33] net/mlx5: wrap glue reg/dereg UMEM with\n\tOS calls", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Wrap glue calls for UMEM registration and deregistration with generic OS\ncalls since each OS (Linux or Windows) has a different glue API\nparameters.\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\nSigned-off-by: Ophir Munk <ophirmu@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/linux/mlx5_common_os.h | 12 ++++++++++++\n drivers/common/mlx5/mlx5_common.c | 4 ++--\n drivers/net/mlx5/mlx5.c | 2 +-\n drivers/net/mlx5/mlx5_devx.c | 16 ++++++++--------\n drivers/net/mlx5/mlx5_flow.c | 4 ++--\n drivers/net/mlx5/mlx5_txpp.c | 12 ++++++------\n 6 files changed, 31 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/linux/mlx5_common_os.h b/drivers/common/mlx5/linux/mlx5_common_os.h\nindex c9f8d7cbc1..f8b215cc29 100644\n--- a/drivers/common/mlx5/linux/mlx5_common_os.h\n+++ b/drivers/common/mlx5/linux/mlx5_common_os.h\n@@ -212,4 +212,16 @@ mlx5_os_dealloc_pd(void *pd)\n {\n \treturn mlx5_glue->dealloc_pd(pd);\n }\n+\n+static inline void *\n+mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access)\n+{\n+\treturn mlx5_glue->devx_umem_reg(ctx, addr, size, access);\n+}\n+\n+static inline int\n+mlx5_os_umem_dereg(void *pumem)\n+{\n+\treturn mlx5_glue->devx_umem_dereg(pumem);\n+}\n #endif /* RTE_PMD_MLX5_COMMON_OS_H_ */\ndiff --git a/drivers/common/mlx5/mlx5_common.c b/drivers/common/mlx5/mlx5_common.c\nindex 044513223c..a00ffcb833 100644\n--- a/drivers/common/mlx5/mlx5_common.c\n+++ b/drivers/common/mlx5/mlx5_common.c\n@@ -148,7 +148,7 @@ mlx5_alloc_dbr_page(void *ctx)\n \t\treturn NULL;\n \t}\n \t/* Register allocated memory. */\n-\tpage->umem = mlx5_glue->devx_umem_reg(ctx, page->dbrs,\n+\tpage->umem = mlx5_os_umem_reg(ctx, page->dbrs,\n \t\t\t\t\t MLX5_DBR_PAGE_SIZE, 0);\n \tif (!page->umem) {\n \t\tDRV_LOG(ERR, \"cannot umem reg dbr page\");\n@@ -232,7 +232,7 @@ mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id,\n \t\t/* Page not used, free it and remove from list. */\n \t\tLIST_REMOVE(page, next);\n \t\tif (page->umem)\n-\t\t\tret = -mlx5_glue->devx_umem_dereg(page->umem);\n+\t\t\tret = -mlx5_os_umem_dereg(page->umem);\n \t\tmlx5_free(page);\n \t} else {\n \t\t/* Mark in bitmap that this door-bell is not in use. */\ndiff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 7d1b4fbdc0..84123f8e3d 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -482,7 +482,7 @@ mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)\n \n \tLIST_REMOVE(mng, next);\n \tclaim_zero(mlx5_devx_cmd_destroy(mng->dm));\n-\tclaim_zero(mlx5_glue->devx_umem_dereg(mng->umem));\n+\tclaim_zero(mlx5_os_umem_dereg(mng->umem));\n \tmlx5_free(mem);\n }\n \ndiff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex de9b204075..235fd5798d 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -155,7 +155,7 @@ mlx5_rxq_release_devx_rq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)\n \tstruct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->rq_dbrec_page;\n \n \tif (rxq_ctrl->wq_umem) {\n-\t\tmlx5_glue->devx_umem_dereg(rxq_ctrl->wq_umem);\n+\t\tmlx5_os_umem_dereg(rxq_ctrl->wq_umem);\n \t\trxq_ctrl->wq_umem = NULL;\n \t}\n \tif (rxq_ctrl->rxq.wqes) {\n@@ -182,7 +182,7 @@ mlx5_rxq_release_devx_cq_resources(struct mlx5_rxq_ctrl *rxq_ctrl)\n \tstruct mlx5_devx_dbr_page *dbr_page = rxq_ctrl->cq_dbrec_page;\n \n \tif (rxq_ctrl->cq_umem) {\n-\t\tmlx5_glue->devx_umem_dereg(rxq_ctrl->cq_umem);\n+\t\tmlx5_os_umem_dereg(rxq_ctrl->cq_umem);\n \t\trxq_ctrl->cq_umem = NULL;\n \t}\n \tif (rxq_ctrl->rxq.cqes) {\n@@ -375,7 +375,7 @@ mlx5_rxq_create_devx_rq_resources(struct rte_eth_dev *dev, uint16_t idx)\n \tif (!buf)\n \t\treturn NULL;\n \trxq_data->wqes = buf;\n-\trxq_ctrl->wq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx,\n+\trxq_ctrl->wq_umem = mlx5_os_umem_reg(priv->sh->ctx,\n \t\t\t\t\t\t buf, wq_size, 0);\n \tif (!rxq_ctrl->wq_umem)\n \t\tgoto error;\n@@ -497,7 +497,7 @@ mlx5_rxq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)\n \t\tgoto error;\n \t}\n \trxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)buf;\n-\trxq_ctrl->cq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, buf,\n+\trxq_ctrl->cq_umem = mlx5_os_umem_reg(priv->sh->ctx, buf,\n \t\t\t\t\t\t cq_size,\n \t\t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n \tif (!rxq_ctrl->cq_umem) {\n@@ -1127,7 +1127,7 @@ mlx5_txq_release_devx_sq_resources(struct mlx5_txq_obj *txq_obj)\n \t\ttxq_obj->sq_devx = NULL;\n \t}\n \tif (txq_obj->sq_umem) {\n-\t\tclaim_zero(mlx5_glue->devx_umem_dereg(txq_obj->sq_umem));\n+\t\tclaim_zero(mlx5_os_umem_dereg(txq_obj->sq_umem));\n \t\ttxq_obj->sq_umem = NULL;\n \t}\n \tif (txq_obj->sq_buf) {\n@@ -1155,7 +1155,7 @@ mlx5_txq_release_devx_cq_resources(struct mlx5_txq_obj *txq_obj)\n \tif (txq_obj->cq_devx)\n \t\tclaim_zero(mlx5_devx_cmd_destroy(txq_obj->cq_devx));\n \tif (txq_obj->cq_umem)\n-\t\tclaim_zero(mlx5_glue->devx_umem_dereg(txq_obj->cq_umem));\n+\t\tclaim_zero(mlx5_os_umem_dereg(txq_obj->cq_umem));\n \tif (txq_obj->cq_buf)\n \t\tmlx5_free(txq_obj->cq_buf);\n \tif (txq_obj->cq_dbrec_page)\n@@ -1243,7 +1243,7 @@ mlx5_txq_create_devx_cq_resources(struct rte_eth_dev *dev, uint16_t idx)\n \t\treturn 0;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\ttxq_obj->cq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx,\n+\ttxq_obj->cq_umem = mlx5_os_umem_reg(priv->sh->ctx,\n \t\t\t\t\t\t(void *)txq_obj->cq_buf,\n \t\t\t\t\t\tcqe_n * sizeof(struct mlx5_cqe),\n \t\t\t\t\t\tIBV_ACCESS_LOCAL_WRITE);\n@@ -1342,7 +1342,7 @@ mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx)\n \t\tgoto error;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\ttxq_obj->sq_umem = mlx5_glue->devx_umem_reg\n+\ttxq_obj->sq_umem = mlx5_os_umem_reg\n \t\t\t\t\t(priv->sh->ctx,\n \t\t\t\t\t (void *)txq_obj->sq_buf,\n \t\t\t\t\t wqe_n * sizeof(struct mlx5_wqe),\ndiff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c\nindex bf86aaaa39..66491bbf78 100644\n--- a/drivers/net/mlx5/mlx5_flow.c\n+++ b/drivers/net/mlx5/mlx5_flow.c\n@@ -6446,7 +6446,7 @@ mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)\n \t}\n \tmem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;\n \tsize = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;\n-\tmem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,\n+\tmem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,\n \t\t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n \tif (!mem_mng->umem) {\n \t\trte_errno = errno;\n@@ -6465,7 +6465,7 @@ mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)\n \tmkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;\n \tmem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);\n \tif (!mem_mng->dm) {\n-\t\tmlx5_glue->devx_umem_dereg(mem_mng->umem);\n+\t\tmlx5_os_umem_dereg(mem_mng->umem);\n \t\trte_errno = errno;\n \t\tmlx5_free(mem);\n \t\treturn -rte_errno;\ndiff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c\nindex d61e43e55d..749529c410 100644\n--- a/drivers/net/mlx5/mlx5_txpp.c\n+++ b/drivers/net/mlx5/mlx5_txpp.c\n@@ -131,13 +131,13 @@ mlx5_txpp_destroy_send_queue(struct mlx5_txpp_wq *wq)\n \tif (wq->sq)\n \t\tclaim_zero(mlx5_devx_cmd_destroy(wq->sq));\n \tif (wq->sq_umem)\n-\t\tclaim_zero(mlx5_glue->devx_umem_dereg(wq->sq_umem));\n+\t\tclaim_zero(mlx5_os_umem_dereg(wq->sq_umem));\n \tif (wq->sq_buf)\n \t\tmlx5_free((void *)(uintptr_t)wq->sq_buf);\n \tif (wq->cq)\n \t\tclaim_zero(mlx5_devx_cmd_destroy(wq->cq));\n \tif (wq->cq_umem)\n-\t\tclaim_zero(mlx5_glue->devx_umem_dereg(wq->cq_umem));\n+\t\tclaim_zero(mlx5_os_umem_dereg(wq->cq_umem));\n \tif (wq->cq_buf)\n \t\tmlx5_free((void *)(uintptr_t)wq->cq_buf);\n \tmemset(wq, 0, sizeof(*wq));\n@@ -268,7 +268,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh)\n \t\treturn -ENOMEM;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\twq->cq_umem = mlx5_glue->devx_umem_reg(sh->ctx,\n+\twq->cq_umem = mlx5_os_umem_reg(sh->ctx,\n \t\t\t\t\t (void *)(uintptr_t)wq->cq_buf,\n \t\t\t\t\t umem_size,\n \t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n@@ -318,7 +318,7 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh)\n \t\tgoto error;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\twq->sq_umem = mlx5_glue->devx_umem_reg(sh->ctx,\n+\twq->sq_umem = mlx5_os_umem_reg(sh->ctx,\n \t\t\t\t\t (void *)(uintptr_t)wq->sq_buf,\n \t\t\t\t\t umem_size,\n \t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n@@ -506,7 +506,7 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)\n \t\treturn -ENOMEM;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\twq->cq_umem = mlx5_glue->devx_umem_reg(sh->ctx,\n+\twq->cq_umem = mlx5_os_umem_reg(sh->ctx,\n \t\t\t\t\t (void *)(uintptr_t)wq->cq_buf,\n \t\t\t\t\t umem_size,\n \t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n@@ -562,7 +562,7 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)\n \t\tgoto error;\n \t}\n \t/* Register allocated buffer in user space with DevX. */\n-\twq->sq_umem = mlx5_glue->devx_umem_reg(sh->ctx,\n+\twq->sq_umem = mlx5_os_umem_reg(sh->ctx,\n \t\t\t\t\t (void *)(uintptr_t)wq->sq_buf,\n \t\t\t\t\t umem_size,\n \t\t\t\t\t IBV_ACCESS_LOCAL_WRITE);\n", "prefixes": [ "v2", "10/33" ] }