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GET /api/patches/8314/?format=api
{ "id": 8314, "url": "http://patches.dpdk.org/api/patches/8314/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1446182873-28814-7-git-send-email-cunming.liang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446182873-28814-7-git-send-email-cunming.liang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446182873-28814-7-git-send-email-cunming.liang@intel.com", "date": "2015-10-30T05:27:48", "name": "[dpdk-dev,v2,06/11] ixgbe: fix rx intr compatible issue with PF mbox", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4e08980d6de0136bf601b2cb18505a50c0954842", "submitter": { "id": 46, "url": "http://patches.dpdk.org/api/people/46/?format=api", "name": "Cunming Liang", "email": "cunming.liang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1446182873-28814-7-git-send-email-cunming.liang@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/8314/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/8314/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 298778E7D;\n\tFri, 30 Oct 2015 06:28:21 +0100 (CET)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n\tby dpdk.org (Postfix) with ESMTP id 639E48E70\n\tfor <dev@dpdk.org>; Fri, 30 Oct 2015 06:28:16 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga103.fm.intel.com with ESMTP; 29 Oct 2015 22:28:16 -0700", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby fmsmga002.fm.intel.com with ESMTP; 29 Oct 2015 22:28:15 -0700", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9U5SDYO023337;\n\tFri, 30 Oct 2015 13:28:13 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9U5SALd028905; Fri, 30 Oct 2015 13:28:12 +0800", "(from cliang18@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9U5SAhe028901; \n\tFri, 30 Oct 2015 13:28:10 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.20,217,1444719600\"; d=\"scan'208\";a=\"839040042\"", "From": "Cunming Liang <cunming.liang@intel.com>", "To": "dev@dpdk.org", "Date": "Fri, 30 Oct 2015 13:27:48 +0800", "Message-Id": "<1446182873-28814-7-git-send-email-cunming.liang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1446182873-28814-1-git-send-email-cunming.liang@intel.com>", "References": "<1443072831-19065-1-git-send-email-cunming.liang@intel.com>\n\t<1446182873-28814-1-git-send-email-cunming.liang@intel.com>", "Subject": "[dpdk-dev] [PATCH v2 06/11] ixgbe: fix rx intr compatible issue\n\twith PF mbox", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When ixgbe runs as a PF, mbox interrupt is prerequisite to make VF start normally.\nAnd PF sometimes won't 'dev_start', so the mbox interrupt register during 'dev_init' is required.\nThe patch rolls back the interrupt register for mbox,lsc to the 'dev_init'.\nAs UIO doesn't support multiple vector, mbox has to occupy the only one.\nIt adds condition check on 'dev_start', rxq interrupt is not allowed when PF running in IOV mode via UIO.\n\nSigned-off-by: Cunming Liang <cunming.liang@intel.com>\n---\n drivers/net/ixgbe/ixgbe_ethdev.c | 45 +++++++++++++++++++++++++++-------------\n 1 file changed, 31 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex 4e1467c..366923f 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -1032,6 +1032,13 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)\n \t\t\teth_dev->data->port_id, pci_dev->id.vendor_id,\n \t\t\tpci_dev->id.device_id);\n \n+\trte_intr_callback_register(&pci_dev->intr_handle,\n+\t\t\t\t ixgbe_dev_interrupt_handler,\n+\t\t\t\t (void *)eth_dev);\n+\n+\t/* enable uio/vfio intr/eventfd mapping */\n+\trte_intr_enable(&pci_dev->intr_handle);\n+\n \t/* enable support intr */\n \tixgbe_enable_intr(eth_dev);\n \n@@ -1708,17 +1715,19 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \tixgbe_pf_host_configure(dev);\n \n \t/* check and configure queue intr-vector mapping */\n-\tif (dev->data->dev_conf.intr_conf.rxq != 0)\n+\tif (((RTE_ETH_DEV_SRIOV(dev).active &&\n+\t rte_intr_cap_multiple(intr_handle)) ||\n+\t !RTE_ETH_DEV_SRIOV(dev).active) &&\n+\t dev->data->dev_conf.intr_conf.rxq != 0) {\n \t\tintr_vector = dev->data->nb_rx_queues;\n-\n-\tif (rte_intr_efd_enable(intr_handle, intr_vector))\n-\t\treturn -1;\n+\t\tif (rte_intr_efd_enable(intr_handle, intr_vector))\n+\t\t\treturn -1;\n+\t}\n \n \tif (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {\n \t\tintr_handle->intr_vec =\n \t\t\trte_zmalloc(\"intr_vec\",\n-\t\t\t\t dev->data->nb_rx_queues * sizeof(int),\n-\t\t\t\t 0);\n+\t\t\t\t dev->data->nb_rx_queues * sizeof(int), 0);\n \t\tif (intr_handle->intr_vec == NULL) {\n \t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n \t\t\t\t \" intr_vec\\n\", dev->data->nb_rx_queues);\n@@ -1805,20 +1814,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \n skip_link_setup:\n \n-\t/* check if lsc interrupt is enabled */\n-\tif (dev->data->dev_conf.intr_conf.lsc != 0) {\n-\t\tif (rte_intr_allow_others(intr_handle)) {\n-\t\t\trte_intr_callback_register(intr_handle,\n-\t\t\t\t\t\t ixgbe_dev_interrupt_handler,\n-\t\t\t\t\t\t (void *)dev);\n+\tif (rte_intr_allow_others(intr_handle)) {\n+\t\t/* check if lsc interrupt is enabled */\n+\t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n \t\t\tixgbe_dev_lsc_interrupt_setup(dev);\n-\t\t} else\n+\t} else {\n+\t\trte_intr_callback_unregister(intr_handle,\n+\t\t\t\t\t ixgbe_dev_interrupt_handler,\n+\t\t\t\t\t (void *)dev);\n+\t\tif (dev->data->dev_conf.intr_conf.lsc != 0)\n \t\t\tPMD_INIT_LOG(INFO, \"lsc won't enable because of\"\n \t\t\t\t \" no intr multiplex\\n\");\n \t}\n \n \t/* check if rxq interrupt is enabled */\n-\tif (dev->data->dev_conf.intr_conf.rxq != 0)\n+\tif (dev->data->dev_conf.intr_conf.rxq != 0 &&\n+\t rte_intr_dp_is_en(intr_handle))\n \t\tixgbe_dev_rxq_interrupt_setup(dev);\n \n \t/* enable uio/vfio intr/eventfd mapping */\n@@ -1930,6 +1941,12 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)\n \tmemset(filter_info->fivetuple_mask, 0,\n \t\tsizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE);\n \n+\tif (!rte_intr_allow_others(intr_handle))\n+\t\t/* resume to the default handler */\n+\t\trte_intr_callback_register(intr_handle,\n+\t\t\t\t\t ixgbe_dev_interrupt_handler,\n+\t\t\t\t\t (void *)dev);\n+\n \t/* Clean datapath event and queue/vec mapping */\n \trte_intr_efd_disable(intr_handle);\n \tif (intr_handle->intr_vec != NULL) {\n", "prefixes": [ "dpdk-dev", "v2", "06/11" ] }